Non-correctable RAM error MPC5604B

[aditya_barve]

Hello, 

I am trying to generate ECC error using EEGR registers. 

When I try to simulate a Non-Correctable error using FRCNCI register, the controller resets. 

Is there any documentation to refer and understand this behavior ?

Thank you,

Aditya

[petervlna]

Hello,

Please refer to AN5200:

https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/AN5200-Error-Correcting-Codes-Implemented-on-MPC...

Chapter 6:

Best regards,

Peter

[aditya_barve]

Thank you for the reference. 

Is there any reason why the controller would reset after setting the non-correctable error generation bit ?

Thanks,

Aditya

[petervlna]

Hello,

it depends on how you handle exception. If it is unhandled they you will get reset. If the reset is triggered in exception, you will get reset. etc...

refer to : 5.1 Based on IVORx exception

Best regards,

Peter