We are using MPC5748G and implemented memory protection for SMPU0 and SMPU1 using PID. In that we have provided two modes, one is Supervisory mode and another is user mode.
In supervisory mode we are providing full access to SMPU0 and SMPU1 address range with fixed PID. In user mode we are providng limited access to SMPU0 and SMPU1 address range
depends on PID set for that application. Now we want to limit the access of some section of SMPU1 address range in Supervisory Mode for Some function and SMPU0 has full access , but we are facing some issues in accessing as PID is common for
SMPU0 and SMPU1 address range. Following example will explain the issue.
Example.
Mode: Supervisory
PID: 0XFF
SMPU0 Address range :
Start Address: 0x00000000
End Address: 0x3FFFFFFF
PID : 0XFF
Peripheral Access:
Start Address: 0xF0000000
End Address: 0xFFFFFFFF
PID : 0XFF
SMPU1 Address range:
Start Address: 0x4000F000
End Address: 0x400BFFFF
PID : 0XFF
Limited access block :
Start Address: 0x40000000
End Address: 0x4000EFFF
PID : 0X0F
Now In supervisory mode Fun_1() should have full access to All memory range and Fun_2() should have acess to all blocks except Limited access block.
As in hardware only one register 48 is provided for accessing regions. We tried it but facing issues in accessing SMPU0 as PID set for region is 0XFF.
Is it possible to provide this kind of access? Plese let us know more information on the same issue.
[Peter] – In this case you need to:
Do not use PID (disable it) for all access blocks. Use it only for limited access block.
Mode: Supervisory
PID: -dissable
SMPU0 Address range :
Start Address: 0x00000000
End Address: 0x3FFFFFFF
PID: -dissable
Peripheral Access:
Start Address: 0xF0000000
End Address: 0xFFFFFFFF
PID: -dissable
SMPU1 Address range:
Start Address: 0x4000F000
End Address: 0x400BFFFF
PID: -dissable
Limited access block :
Start Address: 0x40000000
End Address: 0x4000EFFF
PID : 0X0F - enable
Hi Peter,
Thank you for your reply. The solution which you have provided is possible in case of Single core. In case of multicore it will not possible, as functionality of multicore handled individually.
For example:
On core 0 Fun1() is running in supervisory mode.
On core1 Fun2() is running with limited access mode/user mode
On core2 Fun3() is running with limited access mode/user mode
If I have disable PID of Supervisory block then Fun2() and Fun3() can able to access the memory. Fun2() and Fun3() might be corrupt the memory. So in this case How can I manage this problem.
Please let us know the solution for same issue with multicore functionality.
Regards,
Bhagyashri Rathod
Hi,
To distinguish between tasks on singlecore you can use PID.You can configure several descriptors covering the same address space, so you can assign different access rights for different PIDs.
Multicore:
It is possible to configure several descriptors and access rights separately for each master (using word2 in descriptor).
Additionally you have two levels of accesses based on MasterID and PID. Which gives you freedom to grant/deny accesses to memory regions for multicore.
Peter