MPC577M using Core0 only (not IOP)

[jordimoreno]

Hello,

I am trying to use only Core0, the startup looks OK, but when I try to write into the MC_ME_MCTL to change the mode, I get an exception, then:

- Is it possible to run the Core0 only? Or the Core2(IOP) is the only one that can initialize the ME module?

- If Core0 only is possible, is there any additional configuration need? Basically what I did is just to set the RCHW to 0x005A0001 and set the CPU0 entry point properly.

Thank you,

Jordi.

[petervlna]

Hi,

ME module is not anyhow linked to cores. Any core can write to it. But have in mind it is only one ME for all cores as well as only one RGM module.

After reset:

The IOP continues code execution by searching for the boot header. This core is always active after reset.

This is the header file for the CPU that starts executing the your application code. Generally, the BOOT CPU is either Core_0 or Core_1.

So now you are i n situation where the core2 and your (core0) is running. If you don't need core2 you can now execute "wait" / "halt" instruction on this core to stop the core (not clocked).

Peter

"Basically what I did is just to set the RCHW to 0x005A0001 and set the CPU0 entry point properly."

This doesn't make sense as 0x005A0001 indicates only core 2 (IO_core) active after reset. So CPU0 will be in reset after reset is released.

[jordimoreno]

Peter,

Thank you for your quick answer.

I did a mistake on my original request, I am setting RCHW to 0x005A0001. And I am able to execute code on Core0, you can see the debugger CoreList.  

I get the the issue while Core0 is initializing the MC_ME, and setting the mode to DRUN. Do you think that it is necessary to stop the core2 and this might be the issue?

Best Regards,

Jordi.

[petervlna]

Hi,

No, stopping core2 have no effect on mode transition.

I recommend you to first have a look on some of our reference examples:

MPC5 software example list 

and read reference manual boot chapter carefully.

Your boot header is 0x005A0001. This means, only core2 is active after reset release.

You need to enable core0 in your SW (startup most probably). Some of default startups starts the other cores, like GHS delivered startup.

When your core0 is running. You can perform mode transition. There is only one ME module so whole micro is switched to target mode.

Make sure that you have stable target mode clock before transition. refer to clocking chapter and to mode entry chapter of reference manual.

As I said I was able to execute your code with debugger with no issues multiple times.

Peter

[jordimoreno]

OK, I will take a look to the examples.

Sorry I make a mistake again in my previous message, my bootheader is 0x005A002. I am able to change the mode entry now with Core0 with my own code, the issue is that I am using the Autosar MCU component to initialize the ME module, then I will contact Autosar team if there is any restriction.

Thank you,

Jordi.