MPC5777M ESR0 functional reset coverage

[D75]

Hello,

I have a question about the MPC5777M reset behavior via the external ESR0 signal. My understanding is that an ESR0 signal triggers a functional reset, but not all modules are reset in this process.

Based on Table 8-1, "Module Status During Reset Phases," modules like FCCU and PIT_1 are listed as not being reset. Can you confirm if this table is exhaustive? Are there additional modules or parts of the device that are not reset during a functional reset?

Also, is it possible to manually reset these modules, such as by using MC_RGM? Lastly, is there a way to configure ESR0 so it initiates a destructive reset instead of just a functional reset?

Thanks in advance for your insights.

[D75]

Hello David,

Thank you for your response. I have submitted a follow-up question on the NXP support page.

Best regards 

[davidtosenovjan · Accepted solution]

Q: Based on Table 8-1, "Module Status During Reset Phases," modules like FCCU and PIT_1 are listed as not being reset. Can you confirm if this table is exhaustive?

A: Apparently yes, I have not indication it should not be.

Q: Are there additional modules or parts of the device that are not reset during a functional reset?

A: I don’t think so.

Q: Also, is it possible to manually reset these modules, such as by using MC_RGM?

A: You may use mode entry module and trigger SW functional or SW destructive reset.

Q: Lastly, is there a way to configure ESR0 so it initiates a destructive reset instead of just a functional reset?

A: No, but for this purpose there is a PORST pin.