In case of someone else having the same problem:
I have initialized the following registers to prevent RCCU0 error:
Core Registers r0...r31 (with evsplatfi)
TBL, TBU (spr 284, 285) (with mtspr)
USPRG0 (spr 256)
CTR (spr 9)
LR (spr 8)
SPRG 0-9 (spr 272...279, 604, 605)
SRR 0-1 (spr 26, 27)
CSRR 0-1 (spr 58, 59)
DSRR 0-1 (spr 574, 575)
MCSSR 0-1 (spr 570, 571)
IVPR (spr 63)
DEAR (spr 61)
MCAR (spr 573)
DEC, DECAR (spr 22, 54)
Tobias