MPC5777C: FCCU->RCCU_0 Error

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MPC5777C: FCCU->RCCU_0 Error

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ameyaranade
Contributor II

Hello All,

I am working with MPC5777C processor and i am getting a RCCU_0 error. (Safety cores out of sync during lockstep).

Checker Core is enabled (I verified this by reading the SIU_Lockstep Register and bit 42 in FCCU Register)

 

I cannot find any documentation to know why the RCCU_0 error might be occuring.

Has anyone else had this issue? Could you Point me tp any available documentation.

 

Thanks,

 

Amey

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

This is most probably caused by your software.

I expect incorrect core register initialization. Make sure you initialize all core registers by 64-bit.

I have tried it on few fresh samples without code and no RCCU error occurred.

Peter

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joshuadavidjohn
Contributor II

Hi,

1.  What is the impact of wait instruction that will impact setting RCCUx error ?

Having wait instruction is triggering RCCU error.

2. Can't we use wait instruction, if we have to use wait, what we need to do to get rid of RCCU error

-Joshua

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ameyaranade
Contributor II

Hi,

Thank you for the tip. I shall try it out.

Do you know what does RCCU_0 bit indicate? Is there any Information in any document on the subject?

Thanks,

Amey

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petervlna
NXP TechSupport
NXP TechSupport

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

This is most probably caused by your software.

I expect incorrect core register initialization. Make sure you initialize all core registers by 64-bit.

I have tried it on few fresh samples without code and no RCCU error occurred.

Peter

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joshuadavidjohn
Contributor II

Hi Peter,

We are using MPC5777C processor.

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

You still see RCCU_1 error?

RCCU_0 Means a mismatch inside the z759 core.  RCCU_1 is a mismatch at the bus gasket interface between the core and the system bus. So basically a read or write access didn't match from both cores.  In both cases, it means the core and it checker are "out of sync".  There's no recovery mechanism for this so the reaction needs to be reset and restart in both cases. 

Peter

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joshuadavidjohn
Contributor II

Hi Peter,

Can you send me the list of core registers that needs to be initialized. To my knowledge, we have initialized all the registers, still we end up in RCCU error.

Please help

-Joshua

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teggensberger
Contributor I

In case of someone else having the same problem:

I have initialized the following registers to prevent RCCU0 error:


Core Registers r0...r31 (with evsplatfi)

TBL, TBU (spr 284, 285) (with mtspr)

USPRG0 (spr 256)

CTR (spr 9)

LR (spr 8)

SPRG 0-9 (spr 272...279, 604, 605)

SRR 0-1 (spr 26, 27)

CSRR 0-1 (spr 58, 59)

DSRR 0-1 (spr 574, 575)

MCSSR 0-1 (spr 570, 571)

IVPR (spr 63)

DEAR (spr 61)

MCAR (spr 573)
DEC, DECAR (spr 22, 54)

Tobias

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DanNguyenDuy
NXP Employee
NXP Employee

Hello guys,

At the moment, I'm facing the same problem. Could you send me the assembly instructions you have written?

Best regards,

Dan

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DanNguyenDuy
NXP Employee
NXP Employee

Hello guys,

At the moment, I'm facing the same problem. Could you send me the assembly instructions you have written?

Best regards,

Dan

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joshuadavidjohn
Contributor II

Thank you Tobias, will test and update

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teggensberger
Contributor I

Hi Peter,

we have solved the RCCU_0 error by initializing the core registers that have an unaffected value after startup.
Now there is still a permanent error of RCCU_1. What does cause this error? Have I still forgot some registers?
Tobias