Interfacing MPC5566 with External Memory

[shraddhanagle]

I am trying to interface external memory with MPC5566. The program works fine with the external debugger attached but crashes when attempting to boot from internal flash in release mode. Based on some research, it seems that since the debugger uses some scripts to initialize MMU and other registers while bypassing BAM, the code works fine. There are some posts which suggest that similar initialization needs to be manually done when booting from internal flash. However, I am not able to identify all the changes that need to be made and which files need to be modified for the same. Some code pertaining to MPC5566DEMO_AXM_0321 is not executed (since this board is not used) in the following functions:

__initEBIChipSelects

__initMMUExternalMemory

I have tried to add some code based on that provided for MPC5566DEMO_AXM_0321 replacing values with those specified in the debug script but with no success.

Any help in this regard would be sincerely appreciated. It would be great if some links or sample code is provided for step-by-step interfacing with external memory.

Thanks in advance.

[davidtosenovjan · Accepted solution]

Default MMU TLB entry setting for EBI space is set with Physical Base Address 0x0000_0000. It is because of possible boot from external bus. This need to changed to 0x2000_0000 by user code (it is also being set by debugger script what can be enough in case RAM target, but not in case internal FLASH target because in this case debugger script executes before execution of BAM code).

It can be changed by following source code for  instance:

static asm void External_SRAM_MMU_init(void)
{
    nofralloc
    lis    r3, 0x1002   /* Select TLB entry #, define R/W replacment control */
    mtMAS0 r3           /* Load MAS0 with 0x1002 0000 for TLB entry #2 */
    tlbre               /* Get TLB entry # information */
  
    mfspr  r3, MAS3
    oris  r3, r3, 0x2000    /* EBI Physical Base Addr changed to 0x2000_0000 */
    ori     r3, r3, 0x0000  
                
    mtMAS3 r3
    msync        /* make sure we finished all memory accesses */
    tlbwe        /* Write entry defined in MAS0 (entry 1 here) to MMU TLB */
    isync        /* Wait for tlbwe to complete, then flush instruction buffer */
    blr     
}

[shraddhanagle]

Hi David,

Thank you very much for your response. I was able to get the code working by adding and invoking the above mentioned function. I have been struggling with this issue for days. Very grateful for the help. Thanks again.