When looking at the flash memory map for MPC5777C I can see that there are example usage for them (see bold below).
0x00000000 0x0000FFFF 64 0 0 Low EEPROM data
I can also see this NOTE (MPC5777CRM Rev. 8.1, 09/2018, 25.6.9 ECC on data flash accesses):
* EEPROM should be avoided for storage of executable code
Could anyone explain why this is?
I was planning on putting a small bootloader in first location starting at address 0x0 but now I'm not too sure anymore.
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Hi, with all MPC57xx devices excluding MPC5777C and MPC5746R I could say it is just due to missing suppressed ECC reporting on data flash.
However just with MPC5777C and MPC5746R, ECC 2b error reporting may be enabled as it is affected by PFCR3[DERR_SUP] bit and so the only explanation for the statement is low data retention for small flash blocks.
I think the manual is a little confusing concerning this.
I interpret the manual such that the data retention is dependent on how many P/E cycles that was performed on the flash block.
I guess my question is this:
If you program a small block just once, then will it have the same life expectancy (50 years) as a larger block (256Kb) that is also programmed only once ?
Good point. Seems I have always misinterpret retention/endurance specification a bit. But the graph you pointed out clearly shows data retention specification apply to all blocks.
For larger blocks there is limited maximum endurance (number of erase cycles), but data retention for data stored in certain block is given by number of erase cycles performed before that i.e. it is independent on used block.
So question staying open is why "EEPROM should be avoided for storage of executable code". In my opinion there is not reason for such statement with MPC5777C and MPC5746R where ECC error reporting may be enabled so I believe the note is relic from previous documentation and should be removed.
Let me check with the factory, I will return to you as soon as possible.