D_CLKOUT Frequency Tolerance MPC5674F

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D_CLKOUT Frequency Tolerance MPC5674F

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CNarendra
Contributor III

Hi,

Could you please confirm the frequency tolerance of the EBI D_CLKOUT signal on the MPC5674F? We couldn't find this detail in the datasheet or reference manual.

Thanks,
Narendra C

MPC5674F ,#EBI 

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davidtosenovjan
NXP TechSupport
NXP TechSupport

You can consider it as PLL contribution (worst case) to XOSC tolerance.

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davidtosenovjan
NXP TechSupport
NXP TechSupport

The D_CLKOUT signal is derived from the system clock via the FMPLL.
While the nominal frequency of D_CLKOUT can be configured, the tolerance depends on the accuracy of the external oscillator used as the PLL reference.

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CNarendra
Contributor III

Hi @davidtosenovjan ,

Is there any frequency tolerance introduced by the microcontroller itself, aside from the external crystal?

- Narendra.C

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davidtosenovjan
NXP TechSupport
NXP TechSupport

Actually DS specifies directly CLKOUT jitter:

davidtosenovjan_0-1748007310344.pngdavidtosenovjan_0-1748007310344.png

 

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CNarendra
Contributor III


Whether CLKOUT jitter value can be considered as FCLKOUT tolerance?

-Narendra 

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davidtosenovjan
NXP TechSupport
NXP TechSupport

You can consider it as PLL contribution (worst case) to XOSC tolerance.

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