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******************************************************************************** Detailed Description:  Example shows MCU's temperature measurement with the help of TSENS.  Calibration constants for TSENS0 are read from Test Flash and  SARADC_B is set to measure Vbg and TSENS outputs.  Calculated internal temperature can be displayed on the Terminal.  EVB connection:    Motherboard    J14 - SCI_RX ON    J13 - SCI_TX ON    J25 - SCI_PWR ON    See results on PC terminal (19200, 8N1, None). You should see following text  (with different values for sure)  TSENS - temperature measurement  press any key to continue...  TSENS's calibration constants read from Test Flash  TSCA = 184  TSCB = 21    T = (232 + TSCA * 2^-6) * TSENS_code / VBG_code - (273 + TSCB * 2^-4) [degC]  ----------------------------------------------------------------------------  VBG_code   =  251  TSENS_code =  339  TSENS temp = 42.91 degC  ------------------------------------------------------------------------------  Test HW:  MPC5777M  Maskset:  0N50N  Target :  RAM, internal_FLASH  Fsys:     600 MHz PLL1 with 40 MHz crystal reference  Terminal: 19200baud, 8N1 ********************************************************************************
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This document shows, how to use CodeWarrior 10.6 to program QSPI flash for Power Architecture microcontrollers.   1) Create new project for appropriate microcontroller. 2) Open Debug configuration and duplicate one of the target.   3) Rename duplicated target (optional) 4) Choose the duplicated (renamed) target and click Edit button in Target settings tab.   5) In new screen, click Advanced Programming Options.   6) Check Use Alternative Algorithm and choose the algorithm you want to use. Algorithms are place in CodeWarrior installation folder. Full path is CodeWarrior_installation_folder\MCU\bin\plugins\support\EPPC\gdi\P&E\   7) On the screen Debug configuration, choose the file you want to program to QSPI flash.   Click Apply and Debug.
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Revision 1 of the document is now officially published: http://cache.freescale.com/files/microcontrollers/doc/app_note/AN5200.pdf http://cache.freescale.com/files/microcontrollers/doc/app_note/AN5200SW.zip   Related code examples can be found also here (equal to AN5200SW): Example 1 - MPC5634M_2b_RAM_ECC_error_injection CW210 Example 2 - MPC5674F_1b+2b_RAM_ECC_error_injection CW210 Example 3 - MPC5643L 1b_RAM_ECC_error_injection CW210 Example 4 - MPC5643L 2b RAM and 2b FLASH ECC error injection CW210 Example 5 - MPC5675K-2b_RAM+2b_FLASH_ECC_error_injection CW210
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******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed * frequency * * User can choose, which low power mode should be entered. There is LPU_MODE * macro defined, which allows to choose STOP, STANDBY or LPU_RUN mode. * * If LPU_RUN mode is selected, user can use macro LPU_STOP_SLEEP_STANDBY, * which allows to choose LPU_STOP, LPU_SLEEP or LPU_STANDBY mode. * * Ther is also RTC initialized, which wakeup microcontroller using WKPU after * 5 seconds from some of the LPU is entered. RTC uses FIRC as a source clock, * so FIRC must be enabled in all low power modes. * * * Modified files: mem.ld, sections.ld, startup.s, added file z2_restart.s * * * ------------------------------------------------------------------------------ * Test HW:         MPC5748G-324DS, MPC574xG Motherboard * MCU:             PPC5748GMMN6A 0N78S * Fsys:            PLL0 160MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  USER LED1 to A1 *                    USER LED2 to A2 * * * ********************************************************************************
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Detailed Description:                      This config tool simplifies DCF records calculation for MPC5777M device.                 Look at HowToUse sheet for simple guideline, then work with DCF sheet                 Notes: - Macros have to be enabled!         BR, Petr
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This example contain Lauterbach programming script for Off-line BIST configuration with 90% coverage. For more details refer to application note AN5427 - Using the Built-in Self-Test (BIST) on the MPC5746R
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******************************************************************************** * Detailed Description: * * Example gives possible implementation of input signal period/freq measurement. * eTimer channel capture 1 and 2 features are used. CAPT1/CAPT2 capture counter * value on rising/falling edge of input signal. The FIFO is set to 2 entries * and ICF2 is monitored. Free-running mode is used here. * * eTimer channel 0-1 are cascaded to achieve 1sec/1Hz measuring with 32bit counter.   * EVB connection: *   P8.2  - A[1]  .. eTimer0 channel1 input signal *   P8.1  - A[0]  .. GPIO output, used to show measurement period * *   Route LINFlexD_0 TXD/RXD (PB2/PB3) signals to the main board RS-232 transceiver *   Daughtercard: *   J17.11–12 ON  .. Connect LINFlexD_0 TXD (PB2) to main board. *   J17.8–9 ON .. Connect LINFlexD_0 RXD (PB3) to main board. * *   Motherboard *   J14 - SCI_RX ON *   J13 - SCI_TX ON *   J25 - SCI_PWR ON * * connect pulse signal to the P8.2. * See results on PC terminal (19200, 8N1, None). * Change freq/duty of input signal. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * Terminal: 19200, 8N1, None ********************************************************************************
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******************************************************************************** * Detailed Description: * Sensor board OM11057A which includes two PCF8885 circuits is connected * to MPC5748G via I2C. MPC5748G continuously reads the state of touch sensors * and the state is shown on LED diodes which are driven by I2C circuit PCA9535. * * Used I2C driver: https://community.freescale.com/docs/DOC-330972 * * Touch sensor board (page 9 and 10): * http://www.nxp.com/documents/user_manual/UM10505.pdf * * ------------------------------------------------------------------------------ * * Connection: * * Connect I2C bus (I2C_2 on MPC5748G) to sensor board: * I2C_SCL: P24-33 (pin PE9) on MPC574XG-MB to K3-1 on OM11057A * I2C_SDA: P24-35 (pin PE8) on MPC574XG-MB to K3-13 on OM11057A * Note: use two pull-up resistors on I2C signals (pulled to 3.3V). * The value should be 3k3 - 10k * * Connect power supply from MPC574XG-MB to OM11057A: * GND: P24-2 on MPC574XG-MB to K3-7 on OM11057A * 3.3V: P24-1 on MPC574XG-MB to K3-9 on OM11057A * * Connect SLEEP pins of both PCF8885 to GND (this will ensure that sleep mode * is not entered): * SLEEP1: K3-11 to K2-3 (both on OM11057A) * SLEEP2: K1-6 to K1-8 (both on OM11057A) * * ------------------------------------------------------------------------------ * Sensor board:    OM11057A *                  http://www.nxp.com/documents/user_manual/UM10505.pdf * Test HW:         MPC574XG-324DS Rev.A + MPC574XG-MB Rev.C * MCU:             PPC5748GMMN6A 1N81M * Fsys:            160 MHz PLL * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * ********************************************************************************
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/* * Queue.h * *  Created on: May 28, 2015 *      Author: ShuLizhong */     #ifndef QUEUE_H_ #define QUEUE_H_ #ifdef _cplusplus extern "C" { #endif /*If you want to change the queue type(QUEUE_TYPE) and queue max size(QUEUE_MAX_SIZE),   you should define it at front of include queue.h file. eg: ******in xxx.h file***** code**** #define QUEUE_TYPE   Other type(unsigned int) #define QUEUE_MAX_SIZE   Other size(100) #include "qeue.h" code**** */ #ifndef QUEUE_TYPE #define QUEUE_TYPE unsigned char #endif #ifndef QUEUE_MAX_SIZE #define QUEUE_MAX_SIZE 100 #endif #define bool unsigned int typedef enum {   OK,   FULL,   EMPTY }QUEUE_STATUS; typedef struct {   unsigned int tail;   unsigned int head;   unsigned int size;   unsigned int length;   QUEUE_TYPE data[QUEUE_MAX_SIZE]; }Queue_tag,*pQueue_tag;     __inline void InitQueue(pQueue_tag q) {   q->tail = q->head = q->size = 0;   q->length = QUEUE_MAX_SIZE; } __inline  QUEUE_STATUS EnQueue(pQueue_tag q,QUEUE_TYPE data) {   if(q->size++ == QUEUE_MAX_SIZE)   return FULL;   q->data[q->tail] = data;   q->tail = (q->tail+1) % QUEUE_MAX_SIZE;   return OK; } __inline QUEUE_STATUS DeQueue(pQueue_tag q, QUEUE_TYPE *data) {   if(q->size-- == 0)   return EMPTY;   *data = q->data[q->head];   q->head = (q->head+1) % QUEUE_MAX_SIZE;   return OK; } __inline bool IsQueueEmpty(pQueue_tag q) {   return q->size == 0; } __inline bool IsQueueFull(pQueue_tag q) {   return q->size == QUEUE_MAX_SIZE; } __inline unsigned int GetQueueSize(pQueue_tag q) {   return q->size; } __inline unsigned int GetQueueLength(pQueue_tag  q) {   return q->length; } /*__inline unsigned int DeMoreBytesFromQueue(pQueue_tag q,QUEUE_TYPE *data,unsigned int len) {   unsigned int i = 0;   len++;   return 0; }*/     #ifdef _cplusplus } #endif #endif /* QUEUE_H_ */
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This excel tool simplifies setting of PLL on MPC55xx/56xx devices. First select device and define input/output frequency. Possible configurations are calculated and basic PLL init code is generated as well. NOTE: macro has to be enabled! BR, Petr
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Document describes possible reasons of result swap in eQADC's result FIFO and how to avoid it. Very preliminary version!
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******************************************************************************** * Detailed Description: * This example content a driver for CGM module configuration. * ------------------------------------------------------------------------------ * Test HW:  MPC57xx Motherboard + MPC5744PE257DC minimodule, MPC5744P, * silicon mask set 1N65H * Target :  internal_FLASH* ********************************************************************************
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Detailed Description:                      This config tool simplifies DCF records calculation for MPC5746C device.                 Look at HowToUse sheet for simple guideline, then work with DCF sheet                 Notes: - Macros have to be enabled!         BR, Petr
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******************************************************************************** * Detailed Description: * Purpose of the example is to show how to generate EDC after ECC error in * internal FLASH. Error response in achieved by reading of pre-defined patterns * in UTEST area at address 0x00400080 which generates IVOR1 exception and FCCU * interrupt (FCCU_Alarm_Interrupt). * Example does not show any handling as it is application specific. * The example displays notices in the terminal window (connector J19 on * MPC57xx_Motherboard)(19200-8-no parity-1 stop bit-no flow control on eSCI_A). * No other external connection is required. * ------------------------------------------------------------------------------ * Test HW:         MPC57xx_Motherboard + MPC5744P-144DC * MCU:             PPC5744PFMLQ8,0N15P,QQAA1515N, Rev2.1B * Fsys:            200 MHz PLL with 40 MHz crystal reference * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH, RAM * Terminal:        19200-8-no parity-1 stop bit-no flow control * EVB connection:  default ********************************************************************************
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******************************************************************************** * Detailed Description: * Initializes eQADC module, performs calibration and converts channel 146 * (voltage level of VDD) to check core voltage level and displays it into * terminal window. No external connection required excluding terminal via eSCI. * * ------------------------------------------------------------------------------ * Test HW:        XPC564AKIT208S and XPC564AKIT324S * MCU:            SPC5644AMMG1,0M14X and SPC5644AMVZ1,0M14X * Fsys:           150/132/120/12 MHz * Debugger:       Lauterbach Trace32 *                 PeMicro USB-ML-PPCNEXUS * Target:         RAM, internal_FLASH * Terminal:       19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection: default * ********************************************************************************
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******************************************************************************** * Detailed Description: * Example configures Sigma_Delta ADC and periodically converts ANA0_SDA0 input * (EVB's potentiometer can be connected i.e. J53-1 --> PO15) and displays * results in the terminal window (USBtoUART bridge J21). Terminal settings is * 19200-8-no parity-1 stop bit-no flow control on eSCI_A. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A *                  eSCI_A is USBtoUART bridge (connector J21) * EVB connection:  For ADC: J53-1 (EVB pot's wiper) --> PO15 (header P22) * ********************************************************************************
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A requirement of the standard is to detect the accumulation of latent defects. To meet this requirement the MPC5744P has the ability to execute Built-In Self-Test (BIST) procedures.
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******************************************************************************** * Detailed Description: * This example shows how to reprogram the shadow flash. * * It is highly recommended to read application note "Preventing Device Lockout * via Censorship on MPC55xx and MPC563x Families" * http://www.freescale.com/files/32bit/doc/app_note/AN3787.pdf * * This examples erases the shadow flash, then it restores censorship information * and then NVUSRO nonvolatile register is reprogrammed to disable the watchdog. * The watchdog is disabled by clearing of bit WATCHDOG_EN in NVUSRO. It ensures * that watchdog is disabled automatically during startup of MCU. * Watchdog can be also disabled by software (shown in the code). * * It is important to execute the code from RAM memory because Read-While-Write * is not supported here. * * ------------------------------------------------------------------------------ * Test HW:  XPC56xxMB2 + XPC560B 144LQFP, SPC5604B, silicon mask set 2M27V * Target :  internal_FLASH, RAM * ********************************************************************************
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******************************************************************************** * Detailed Description: * * Application initializes SPI0 module as a master and SPI2 module as a slave. * Data are sent from master to slave and from slave to master. After data are * received, interrupt for each module is handled and data are saved to global * variables. * * * ------------------------------------------------------------------------------ * Test HW:         MPC5775K-356DS, MPC57xx Motherboard * MCU:             PPC5775KMMY3A 0N76P * Fsys:            PLL0 266MHz *                    Z4 Core 133MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  P18.0 to P18.5 (CS_0) *                    P18.2 to P18.7 (SCK) *                    P18.3 to P18.9 (SIN - SOUT) *                    P18.4 to P18.8 (SOUT - SIN) * * ********************************************************************************
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******************************************************************************** * Detailed Description: * DRUN mode with max core frequency(200MHz) generated from PPL0 * This example demonstrates ECC error injection to peripheral RAM *  and ECC error reporting to MEMU * --------------------------------------------------------------------------------------------- * Test HW:  MPC57xx * Maskset:  1N15P * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference *           ******************************************************************************** Revision History: 1.0     Apr-04-2016     b21190(Vlna Peter)  Initial Version 1.1    Aug-15-2017     b21190(Vlna Peter)  EIM ECC RAM error injection to DMA added *******************************************************************************/
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