******************************************************************************** * Detailed Description: * Application performs basic initialization, initializes interrupts, blinking * one LED by Core0, second by Core1 (by interrupt), initializes and display * notice via UART terminal and then terminal ECHO. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * EVB connection:  ETPUA30 (PortP P23-15) --> USER_LED_1 (P7-1) *                  ETPUA31 (PortP P23-14) --> USER_LED_2 (P7-2) * ********************************************************************************

******************************************************************************** * Detailed Description: * This example shows, how to initialize FlexCAN modules for simple transmission * and reception using RX interrupt. Both modules are configured for 100kbit/s * bit rate. CAN_0 module transmits message using MB0. CAN_1 module receives * message using interrupt via MB0. * * * ------------------------------------------------------------------------------ * Test HW:         MPC5748G-324DS, MPC574XG - Motherboard * MCU:             PPC5748GMMN6A 1N81M * Fsys:            PLL0 160MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  Connect jumpers J15 and J16 on motherboard *                    Connect P14 H to P15 H *                    Connect P14 L to P15 L * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * start both Z7 cores, interrupts initialization, blinking three LED by interrupts, * initializes and display notice via UART terminal and then terminal ECHO. * Each core serves one interrupt and one LED. * * The example configures the device for maximum performance by initialization of * instruction/data cache and enabling of branch prediction for each core * (startup.s files). * * ------------------------------------------------------------------------------ * Test HW:         MPC5777M-512DS, MPC57xx Motherboard * MCU:             PPC5777MQMVA8 0N78H * Terminal:        19200-8-no parity-1 stop bit-no flow control on LINFlexD_2 * Fsys:               600MHz * * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  USER LED1 connected to P8.0, LED2 connected to P8.1 *                  LED3 connected to P8.2 * ********************************************************************************

******************************************************************************** * Detailed Description: * Example dimmes LED1 according on board potentiometr. LED2 and LED3 demostrates * ADC watchdog functionality. LED2 is turned on when signal level is below LOW * threshold, LED3 is turned on when signal is above HIGH threshold. * Example also displays coverted results to the terminal window. * ------------------------------------------------------------------------------ * Test HW:         XPC560B 100LQFP, XPC56XX EVB MOTHEBOARD Rev.C * MCU:             PPC5604BE MLL 1M27V * Terminal:        19200-8-no parity-1 stop bit-no flow control on LINFLEX_0 * Fsys:            64/48 MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          RAM, internal_FLASH * EVB connection:  - initialize PB[8] as ANS0: connect potentiometer to PB[8]                      pin, remove J30 jumper and connect J30.2 with P2.9                    - header J8 (LED_EN) fully fitted ********************************************************************************

List of examples published by NXP technical support: MPC5 software example list * List of documents and tools published by NXP technical support: MPC5 document & tool list * * All of the source code placed in spaces above is for example use only. NXP does not accept liability for use of this code in the user’s application.

******************************************************************************** * Detailed Description: * Purpose of the example is to show how to generate Multi-bit or Single-bit * ECC error in internal FLASH (user must choose it in the option at the end of * main function). * Flash over-programming is used to generate a non-correctable (or single-bit) * ECC error in FLASH. The bad data is accessed then what's generate IVOR1 * exception or FCCU_Alarm_Interrupt. Both function calls MEMU handler. * Example also offers useful macros for MEMU module. * The example displays notices in the terminal window (connector J19 on * MPC57xx_Motherboard)(19200-8-no parity-1 stop bit-no flow control on eSCI_A). * No other external connection is required. * ------------------------------------------------------------------------------ * Test HW:         MPC57xx_Motherboard + MPC5744P-144DC * MCU:             PPC5744PFMLQ8,0N15P,QQAA1515N, Rev2.1B * Fsys:            200 MHz PLL with 40 MHz crystal reference * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH, RAM * Terminal:        19200-8-no parity-1 stop bit-no flow control * EVB connection:  default ********************************************************************************

This excel tool helps to configure Core MPU on MPC57xx devices. It generates asm code and also command for Lauterbach debugger for selected configuration of MPU entry.

******************************************************************************** * Detailed Description: * * * This example demonstrate functionality of XBIC_0 error injection *  capability on XBAR_0. The fault is generated on Core access to SRAM. *  After fault generation it is propagated to FCCU unit as NCF[38]. * * ------------------------------------------------------------------------------ * Test HW:  MPC57xx * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     16MHz IRC * ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * initializes interrupts. STM_0 channel 0 is initialized to generate 100ms * periodic interrupt. Notice that STM is free running up counter, so it's * necessary to add calculated value to compare register each time in ISR handler. * * Test HW:         X-MPC5744PE257DC, MPC57xx motherboard * MCU:             SPC5744PGMMM9 1N15P * Fsys:            200 MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  User LED 1 connected to A0 (P8.0), * ********************************************************************************

******************************************************************************** * Detailed Description: * Initializes eQADC module, performs calibration and cyclically converts PMC * internal channel as specified by macros CHOOSEN_PMC_ADC_CHNL, * CHOOSEN_PMC_ADC_SCALE and CHOOSEN_PMC_ADC_COMMAND to check particular voltage * level, displaying it into terminal window. * No external connection required excluding terminal via eSCI. * ------------------------------------------------------------------------------ * Test HW:         XPC567XKIT516 - MPC567xADAT516 Rev.D, MPC567XEVBFXMB Rev.C * MCU:             PPC5676RDMVY1 3N23A * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A * Fsys:            180MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          RAM, internal_FLASH * EVB connection:  default ********************************************************************************

******************************************************************************** * Detailed Description: * * Example gives possible implementation of input signal period/freq measurement. * eTimer channel capture 1 and 2 features are used. CAPT1/CAPT2 capture counter * value on rising/falling edge of input signal. The FIFO is set to 2 entries * and ICF2 is monitored. Free-running mode is used here. * * eTimer channel 0-1 are cascaded to achieve 1sec/1Hz measuring with 32bit counter. * * DMA is used to read CAPT1/2 registers and form 32bit values used in calculation. * * EVB connection: *   P8.2  - A[1]  .. eTimer0 channel1 input signal *   P8.1  - A[0]  .. GPIO output, used to show measurement period * *   Route LINFlexD_0 TXD/RXD (PB2/PB3) signals to the main board RS-232 transceiver *   Daughtercard: *   J17.11–12 ON  .. Connect LINFlexD_0 TXD (PB2) to main board. *   J17.8–9 ON .. Connect LINFlexD_0 RXD (PB3) to main board. * *   Motherboard *   J14 - SCI_RX ON *   J13 - SCI_TX ON *   J25 - SCI_PWR ON * * connect pulse signal to the P8.2. * See results on PC terminal (19200, 8N1, None). * Change freq/duty of input signal. * * ------------------------------------------------------------------------------ * Test HW:  MPC5744P * Maskset:  1N65H * Target :  internal_FLASH * Fsys:     200 MHz PLL with 40 MHz crystal reference * Terminal: 19200, 8N1, None ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq., * setup clock for peripherals. * * This example shows, how to use some of ETimer modes. Channel 0 is set to * Fixed-Frequency PWM Mode and generates PWM signal with approximate frequency * 507Hz. This signal is routed to the UserLED1. * * Channel 1 is set to Count mode and generates 0,25 second interrupt. * In the interrupt service routine, duty cycle is increased from 0% to 100% * with step 6.25%. This shows for example, how can be controlled the brightness * of the LED. * * Channel 2 is set to Variable-Frequency PWM Mode and generates PWM signal with * frequency 10KHz. This signal is routed to the UserLED2. * * ------------------------------------------------------------------------------ * Test HW:         MPC5775K-356DS, MPC57xx Motherboard * MCU:             PPC5775KMMY3A 0N76P * Terminal: * Fsys:            PLL0 266MHz *                    Z4 Core 133MHz * Debugger:        Lauterbach Trace32 *                  PeMicro USB-ML-PPCNEXUS * Target:          internal_FLASH (debug mode, release mode) * EVB connection:  UserLED1 connected to P19.0 *                     UserLED2 connected to P19.2 * * ********************************************************************************

******************************************************************************** * Detailed Description: * Test HW:  MPC57xx + S32R274RRUEVB * Maskset:  1N58R * Target :  internal_FLASH * Fsys:     240 MHz PLL with 40 MHz crystal reference for z7 and 120MHz for z4 ******************************************************************************** Revision History: 1.0     Apr-02-2019     b21190(Vlna Peter)  Initial Version 1.1    Apr-03-2019     b21190(Vlna Peter)  Added SWT reset reaction *******************************************************************************/ This example demonstrated the reset trigger on first SWT_2 timeout. Following screens shows the reset source after code execution in standalone mode and debugger connection afterwards:

In order to enable the RappID bootloader. It needs to program the C:\Freescale\RAppIDBL\RBF_Files\MPC5744P.rbf file into the MCU. User can use S32DS to program the rbf file to MCU. After that the Rappid bootloader PC utility can communicate with the MCU.

******************************************************************************** * Detailed Description: * Read attached document "How to use Register Protection on MPC5748G.pdf" * for detailed explanation. * This example shows how to lock and unlock register MC_ME.RUN_MC[3].R. * One option is to write directly to memory via pointers, second option is * to use macros from header file reg_prot.h. * ------------------------------------------------------------------------------ * Test HW:         MPC574XG-324DS Rev.A + MPC574XG-MB Rev.C * MCU:             PPC5748GMMN6A 1N81M * Fsys:            160 MHz PLL * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * ********************************************************************************

******************************************************************************** * Detailed Description: * This example demonstrates basic functionality of SARADC (10-bit ADC0 and 12-bit ADC1) in one-shot conversion mode. ******************************************************************************** * Test HW:  MPC57xx * Maskset:  1N81M * Target :  SRAM * Fsys:     160 MHz PLL ******************************************************************************** Revision History: 1.0     Oct-29-2014     b21190(Vlna Peter)  Initial Version 1.1    Nov-20-2014    b21190(Vlna Peter)  Modified for Cut2.0 1.2    Nov-20-2014    b21190(Vlna Peter)  Added SWT_0 dissabling in startup 1.3    Mar-10-2016    b21190(Vlna Peter)  Fixed clock configuraion for PLL 1.4    Mar-10-2016    b21190(Vlna Peter)  Added ADC driver *******************************************************************************/

******************************************************************************** Detailed Description: Configures the FlexCAN 0 to transmit and receive a CAN message  Baudrate to is set to 500kbps. In this config, RXFIFO is used to receive a messages. 16 filter elements are defined in the RXFIFO table. Both standard and extended IDs are used. MB10 is moreover used to receive a message with given standard ID. MB11 is used to transmit a message upon button press. The callback function is installed as well and is it called each time message is received in MB10, RXFIFO or message is transmitted. NOTE! Termination resistor (120Ohm) have to be placed on transceivers output             12V power supply must be connected. ------------------------------------------------------------------------------ Test HW: DEVKIT-MPC5748G Maskset: 0N78S Target : FLASH Fsys: 160 MHz PLL ********************************************************************************

******************************************************************************** * Detailed Description: * Application performs basic initialization, setup PLL to maximum allowed freq. * DSPI_A is configured as master, DSPI_B is configured as slave. * DSPI modules are connected together by wires on EVB. * Four DMA descriptors are initialized: * - master transmit * - master receive * - slave transmit * - slave receive * All transfers are done by DMA, master sends/receives 8 words and slave * receives/sends 8 words. * ------------------------------------------------------------------------------ * Test HW:         XPC567XKIT516 - MPC567xADAT516 Rev.D, MPC567XEVBFXMB Rev.C * MCU:             PPC5676RDMVY1 3N23A * Fsys:            180MHz * Debugger:        Lauterbach Trace32 * Target:          RAM, internal_FLASH * EVB connection:  PCSA0 (J29-1) -> PCSB0 (J30-1) *                  SIN_A (J29-7) -> SOUT_B (J30-8) *                  SOUT_A (J29-8) -> SIN_B (J30-7) *                  SCK_A (J29-9) -> SCK_B (J30-9) * ********************************************************************************

******************************************************************************** * Detailed Description: * * eQADC mode: Continuous scan with external trigger. * Periodic trigger from eMIOS_0 ch16. * ANA ch5 is converted and result is sent to RFIFO0. * * eMIOS ch0 duty cycle is modified based on result data, so LED is dimming * if connected to eMIOS ch0 output. * * ADC result is also displayed on terminal each second. * * ------------------------------------------------------------------------------ * Test HW:         MPC5777C-512DS Rev.A + MPC57xx MOTHER BOARD Rev.C * MCU:             PPC5777CMM03 2N45H CTZZS1521A * Fsys:            PLL1 = core_clk = 264MHz, PLL0 = 192MHz * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * Terminal:        19200-8-no parity-1 stop bit-no flow control on eSCI_A *           use USB connector (J21) on minimodule * * EVB connection:  ETPUA30 (PortP P23-15) --> USER_LED_1 (P7-1) *                  ETPUA31 (PortP P23-14) --> USER_LED_2 (P7-2) * *           eMIOS ch0 (PortG P14-16)--> USER_LED_4 (P7-4) *                  ANA0       (PortQ P24-5) --> RV1 (J53.1) * ********************************************************************************

This document describes how to use On-line BISTs on MPC5777C. --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- STCU2 On-line BIST (MBIST+ LBIST) execution time on NXP Evaluation board ( X-MPC5777C-561DS) is 25.8ms. This measured time is valid for: System clock PLL = 200MHz STCU module clock = System clock / 4 MBIST = 50MHz LBIST = 25MHz Result after testing MBIST+LBIST = 0 faults latched in ERR_STAT register and all LBISTs was successfully executed. --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- STCU2 On-line LBIST only execution time on NXP Evaluation board ( X-MPC5777C-561DS) is 37.4ms. This measured time is valid for: System clock PLL = 200MHz STCU module clock = System clock / 4 LBIST = 25MHz --------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- LBIST on 50MHz I do not recommend to run LBIST at 50MHz as it was failing in my setup.