Use of the Flexspi interface for the RT1052

[jiaxin]

Hi,sir

I would like to confirm the usage of Flexspi interface of RT1052 chip:

1. I need to use Flexspi interface to communicate with two devices, namely NOR Flash and FPGA, which correspond to FlexspiA interface and FlexspiB interface respectively, and both use 4-wire communication mode;

2. After the system is powered on, I need to access two devices at the same time. Is this allowed? Specifically, when I am working with FLASH, am I allowed to read and write FPgas?

3.in particular, the communication with the FPGA is a regular 2ms communication, but the operation of FLASH takes a long time, will it affect the communication cycle with the FPGA?

4. Is there a better plan to recommend?

Thank you!

[Harry_Zhang]

Hi @jiaxin 

The FlexSPI module can access both FlexSPIA and FlexSPIB interfaces, but not at the same time. FlexSPI performs sequential access, meaning one transaction must complete before the next begins.

NOR Flash operations like erasing or programming are relatively time-consuming. Erase operations, for example, can take milliseconds to complete. During this time, the FlexSPI hardware may be occupied, causing delays in accessing the FPGA.

If feasible, you could two FlexSPI controllers This allows completely independent control of two FlexSPI interfaces.

FLEXSPI for NOR FLASH, FLEXSPI2 for FPGA.

BR

Harry

[jiaxin]

Hi,Harry

Are you saying that the RT1052 has two FlexSPI controllers?

How do I understand that hardware is occupied during NOR Flash operation? Delay in accessing the FPGA? When I use it, the signal of FlexSPI_A interface is connected to FLASH, and FlexSPI_B is connected to FPGA device.

Do you mean FlexSPI_A and FlexSPI_B by using two FlexSPI controllers to control two FlexSPI interfaces completely independently? Where can I get an example of configuring two FlexSPI interfaces with complete independent control?

THANKS!

JIAXIN

[Harry_Zhang · Accepted solution]

Hi @jiaxin 

1. I just checked the IMXRT1052 data sheet. Unfortunately, it only has one Flexspi controler.

2. "How do I understand that hardware is occupied during NOR Flash operation? Delay in accessing the FPGA? When I use it, the signal of FlexSPI_A interface is connected to FLASH, and FlexSPI_B is connected to FPGA device."

What I mean is that if FlexSPI is accessing Flash, it cannot access FPGA at the same time.

3. Do you mean FlexSPI_A and FlexSPI_B by using two FlexSPI controllers to control two FlexSPI interfaces completely independently?

No, if the IMXRT1052 has two Flexspi controlers. FlexSPI1_A can control NOR FLASH. FlexSPI2_A can control FPGA, they are independent.

BR

Harry

[jiaxin]

Hi,Harry

1、If we plan to use the RT1052, it has a FlexSPI controller, as shown in the attached figure, still can't access the FPGA when reading and writing FLASH? Can't access independently, must need to wait for the end of the access to the other side of the data?

2、If two tasks with different priorities are set to access two devices, the priority of the task with high real-time requirements is set to high. What should be paid attention to in this case?

 

Thank you!

jiaxin

[Harry_Zhang]

Hi

1. Yes, you are right.

2. In a FreeRTOS-based system, if you have two tasks with different priorities accessing devices on the same FlexSPI bus,

I think you should use FreeRTOS synchronization mechanisms (e.g., mutexes) to protect access to shared resources like the FlexSPI bus.

If the high-priority task has strict real-time requirements, consider limiting the frequency or duration of FlexSPI accesses by the low-priority task.

BR

Harry