Query regarding the memories available for code execution on Cortex-M33 of i.MX93EVK board

[Vikas7Bal]

Hi,
I am working with iMX93EVK board (especially bare metal programming of Cortex-M33)
I have tried the examples (ethosu_apps) available as part of sdk_2_16 and I observed that, the code is executing from ITCM memory, M33 Code TCM (0FFE_0000 - 0FFF_FFFF) ~128KB.

For my bare metal applications, this memory is not enough, so I am exploring about other options from where I can execute my application other than TCM memory. (I have observed from memory map that there are different memories available like OCRAM)

So, can someone please provide any insights regarding this issue?

[Zhiming_Liu]

Hello,

You can try to take .text section to OCRAM and reserve the left in TCM by modifing the linker script. Or put it into DDR, but need to boot into Linux.

Best Regards,
Zhiming

[Vikas7Bal]

@Zhiming_Liu , thanks for your reply.

> put it into DDR, but need to boot into Linux.

In my approach, I am trying to execute the binary in u-boot, by loading the *.bin file using "boot aux"
I have tried placing the *.text section into OCRAM, but the app didn't even launch (I don't see anything on Cortex-M33 COM port)

So, I am not sure if I am following right procedure?

Can you elaborate more on the procedure of launching after booting into linux?

Thanks!

[Zhiming_Liu]

Hello,

The linker file should like this :

  m_interrupts          (RX)  : ORIGIN = 0x20480000, LENGTH = 0x00000478
  m_text                (RX)  : ORIGIN = 0x20480478, LENGTH = 0x0001FB88
  m_m33_suspend_ram     (RW)  : ORIGIN = 0x204B0000, LENGTH = 0x00002000
  m_a55_suspend_ram     (RW)  : ORIGIN = 0x204B2000, LENGTH = 0x00001000
  m_data                (RW)  : ORIGIN = 0x204B3000, LENGTH = 0x0001B000
  m_rsc_tbl             (RW)  : ORIGIN = 0x204CE000, LENGTH = 0x00001000

Then also need to modify atf and kernel source code.

ATF, make sure that M33 can access the OCRAM.

diff --git a/plat/imx/imx93/trdc_config.h b/plat/imx/imx93/trdc_config.h
index 6c8b8f8fa..6d2ff02b6 100644
--- a/plat/imx/imx93/trdc_config.h
+++ b/plat/imx/imx93/trdc_config.h
@@ -117,7 +117,7 @@ struct trdc_glbac_config trdc_n_mbc_glbac[] = {
        { 2, 0, SP(RW) | SU(RW) | NP(RW) | NU(RW) },
        { 2, 1, SP(R) | SU(R) | NP(R) | NU(R) },
        /* MBC3 */
-       { 3, 0, SP(RW) | SU(RW) | NP(RW) | NU(RW) },
+       { 3, 0, SP(RWX) | SU(RWX) | NP(RWX) | NU(RWX) },
        { 3, 1, SP(RWX) | SU(RWX) | NP(RWX) | NU(RWX) },
 };
 
@@ -167,8 +167,8 @@ struct trdc_mbc_config trdc_n_mbc[] = {
        { 1, 3, 3, MBC_BLK_ALL, 0, false }, /* MBC1 MLMIX for A55 DID3 */
        { 2, 3, 0, MBC_BLK_ALL, 0, false }, /* MBC2 GIC for A55 DID3 */
        { 2, 3, 1, MBC_BLK_ALL, 0, false }, /* MBC2 GIC for A55 DID3 */
-       { 3, 3, 0, MBC_BLK_ALL, 1, true  }, /* MBC3 OCRAM for A55 DID3 */
-       { 3, 3, 1, MBC_BLK_ALL, 1, true  }, /* MBC3 OCRAM for A55 DID3 */
+       { 3, 3, 0, MBC_BLK_ALL, 1, false  }, /* MBC3 OCRAM for A55 DID3 */
+       { 3, 3, 1, MBC_BLK_ALL, 1, false  }, /* MBC3 OCRAM for A55 DID3 */
 
        { 3, 3, 0, 0, 0, false  }, /* MBC3 OCRAM for A55 DID3 */
        { 3, 3, 0, 1, 0, false  }, /* MBC3 OCRAM for A55 DID3 */

Kernel

diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
index 4d1aa281f33e..2d462edd889f 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
@@ -59,8 +59,13 @@ vdev1vring1: vdev1vring1@a4018000 {
                        no-map;
                };
 
-               rsc_table: rsc-table@2021e000 {
-                       reg = <0 0x2021e000 0 0x1000>;
+               ocram: ocram@20480000 {
+                       reg = <0 0x20480000 0 0x60000>;
+                       no-map;
+               };
+
+               rsc_table: rsc-table@204CE000 {
+                       reg = <0 0x204CE000 0 0x1000>;
                        no-map;
                };
 
@@ -335,7 +340,7 @@ &cm33 {
        mboxes = <&mu1 0 1>,
                 <&mu1 1 1>,
                 <&mu1 3 1>;
-       memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+       memory-region = <&ocram>, <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
                        <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
        fsl,startup-delay-ms = <500>;
        status = "okay";
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 5e15dd127bde..cb0ec0946122 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -159,6 +159,9 @@ static const struct imx_rproc_att imx_rproc_att_imx93[] = {
 
        { 0xC0000000, 0xC0000000, 0x10000000, 0 },
        { 0xD0000000, 0xC0000000, 0x10000000, 0 },
+
+       /* OCRAM NON-SECURE */
+       { 0x20480000, 0x20480000, 0x00060000, 0 },
 };
 
 static const struct imx_rproc_att imx_rproc_att_imx8qm[] = {

Best Regards,
Zhiming

[Vikas7Bal]

@Zhiming_Liu , I am not sure of the process by which the atf and dtb files generated for my board (could you provide any reference?)
But, I tried the following procedure :
I have cloned these repos :
https://github.com/NXP/imx-atf
https://github.com/NXP/imx-linux
And updated the changes, but I am not sure how to build them and also update them on my board

So, can you provide any procedure or references available that I could refer to?

Thanks!

[Zhiming_Liu]

Hello,

Please refer https://www.nxp.com/docs/en/user-guide/IMX_PORTING_GUIDE.pdf

and 4.5.13 How to build imx-boot image by using imx-mkimage in this guide:https://www.nxp.com/docs/en/user-guide/IMX_LINUX_USERS_GUIDE.pdf

Best Regards,
Zhiming

[Vikas7Bal]

Hi,

It's been a while since I posted for help. Can I get some support in this issue?

I am struggling with code execution from ITCM memory only for Cortex-M33 and I would like to use the DDR or OCRAM memories available for code execution?

Thanks!