NXP MCXN547 JTAG Pin Configuration

[Sparklin]

Hi NXP,

We reserve the JTAG pins for potential JTAG functionality on the device.

Although we will primarily use SWD for development and debugging, we still need to know how to configure the device to support full JTAG functionality if needed.

Here are the steps from google to support the JTAG on MCXN547.

Please correct me if there is anything wrong or provide the related document. That would be great.

By default, the MCU is set to SWD mode. To enable JTAG, we need to configure the BOOT_CFG fuses—either directly or via the ISP tool (blhost).

Below is an example of how to do this using blhost:

# Check if the MCU is connected
blhost -p /dev/ttyUSB0 -- get-property 1

# Read the current BOOT_CFG value
blhost -p /dev/ttyUSB0 -- read-memory 0x9E410 4

# Program the JTAG-enable fuse (example value only)
blhost -p /dev/ttyUSB0 -- fuse-program-once 0x460 0x00000010

# Reset the MCU

Use a debug device like the PEmicro Multilink, with proper configuration applied within MCUXpresso IDE to support JTAG.

[Alice_Yang · Accepted solution]

Hello @Sparklin 

Thanks for your question.

Both SWD and JTAG are enabled on the MCXN547, so there's no need for software configuration. For SWD/JTAG hardware design, please refer to the schematic of the FRDM - MCXN947.

https://www.nxp.com/webapp/Download?colCode=90818-MCXN947SH 

If you using MCUXpresso with J-link probe,  choose JTAT as below:

If you have any issues or concerns, don't hesitate to contact me.

Thank you.

BR

Alice

[gusarambula]

Hello @Sparklin ,

This post in on the NXP Public forums. Were you trying to post it in a different community space?

Regards,
Gustavo

[Sparklin]

Hi Gusarambula,

Here is the first place to post the question.
Just want to figure out the way to enable JTAG mode is by configuring the BOOT_CFG fuses with blhost.

Regards,
Spark