MCXA346 3路ADC同步采集的问题

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MCXA346 3路ADC同步采集的问题

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346500452
Contributor III

你好

我看了数据手册MCXA有4个ADC,然后手册上写ADC0可以触发所有的ADC采集再同一时刻。

所有我在frdmmcxa346_lpadc_trigger_exception例程的基础上,加上了Ctimer0的MR1,0.5ms周期性触发ADC采集,每个ADC配置的采集1个通道。

现在的问题是只能进入ADC0的中断(是按照定时器周期触发的),ADC1和ADC2中断进不去。

这个同步采集,是这样用的吗?难道是我理解错了吗?

我把我的工程附在附件里了。

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello @346500452 

I have reviewed your code. Please make the following changes and then test:

  1. Enable hardware trigger for ADC2.
  2. Configure ADC1 and ADC2 to also use Trigger Control Register 0. In the INPUTMUX, route to ADC1_TRIG0 and ADC2_TRIG0.
Alice_Yang_0-1767845363629.png

 

Alice_Yang_1-1767845368287.png

 

If it still does not work, disable ADC0 and ADC2, and check whether ADC1 works correctly.

Thank you.

 

BR

Alice

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1,187 Views
Alice_Yang
NXP TechSupport
NXP TechSupport

Hello @346500452 

I have reviewed your code. Please make the following changes and then test:

  1. Enable hardware trigger for ADC2.
  2. Configure ADC1 and ADC2 to also use Trigger Control Register 0. In the INPUTMUX, route to ADC1_TRIG0 and ADC2_TRIG0.
Alice_Yang_0-1767845363629.png

 

Alice_Yang_1-1767845368287.png

 

If it still does not work, disable ADC0 and ADC2, and check whether ADC1 works correctly.

Thank you.

 

BR

Alice

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346500452
Contributor III

你好,爱丽丝

    谢谢。我已经解决了上述的问题。

    需要补充的一点是,在debug的时候,需要开启overflow中断,并rst FIFO,否则会在debug暂停的时候产生overflow,而且ADC会自动停止。全速运行时不会存在这个问题。

    if (status & kLPADC_ResultFIFO0OverflowFlag)
    {
        LPADC_ClearStatusFlags(ADC0, kLPADC_ResultFIFO0OverflowFlag);
        LPADC_DoResetFIFO(ADC0);
    }

 

下一步,我打算加上DMA来搬运ADC完成采集的数据,我现在是用的3路ADC,是需要用DMA的3个通道来搬运吗,有其他更好的方法吗?

   

谢谢

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello @346500452 

是的,需要3个通道DMA来搬运。因为您使用的是3个ADC并发,每个ADC需要各自的DMA通道。

 

BR

Alice

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