MCXA153 Low Power Cache Controller (LPCAC)

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MCXA153 Low Power Cache Controller (LPCAC)

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seanwu
Contributor IV

Dear sir,

Is there any document or example of Low Power Cache Controller (LPCAC)?

How to use this feature to add GPIO raise/fall performance?

Thanks.

BR,

Sean Wu

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seanwu
Contributor IV

Dear @ZhangJennie ,

Thanks for your reply.

May I double check with you that if  LPCAC is enabled by default in SystemInit(); after reset?

Thanks.

BR,

Sean Wu

 

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ZhangJennie
NXP TechSupport
NXP TechSupport

Thanks. The new version of SDK should enable LPCAC in initialization code.

You said the performace is not good. Could you specify how did you test the performance? Do you test coremark? are your test on  internal Flash or external?

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seanwu
Contributor IV

Dear @ZhangJennie ,

I am using MCXA153 gpio_led_output example in SDK_2_14_2_FRDM-MCXA153, and testing on FRDM-MCXA153. AI add a gpio3_6 to toggle, and measure it's raising time. Default is using internal flash.

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ZhangJennie
NXP TechSupport
NXP TechSupport

HI 

 if your GPIO performance doesn't meet your expectation, normally it's not due to LPCAC, but specific peripheral. We suggest you checking parasitic capacitance on IO pin.  For more information on this topic, please refer and discuss under  https://community.nxp.com/t5/MCX-Microcontrollers/MCXA153-GPIO-rise-fall-time-performance/td-p/19885...

Thanks,

Jun Zhang

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seanwu
Contributor IV
Dear @ZhangJennie ,

Thanks for your reply.

BR,
Sean Wu
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seanwu
Contributor IV

Dear @ZhangJennie ,

In gpio_led_output example, LPCAC is enabled in SystemInit(); So, after reset LPCAC is enabled.

But the performance is not good.

Thanks.

BR,

Sean Wu

seanwu_0-1730885256806.png

seanwu_1-1730885291291.png

 

 

 

 

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ZhangJennie
NXP TechSupport
NXP TechSupport

Hello seanwu,

When code is running in Flash, enabling LPCAC will improve the performance as same as code is running in RAM. We have measured it with coremark.

However, if your GPIO performance doesn't meet your expectation, normally it's not due to LPCAC, but specific peripheral. We suggest you checking parasitic capacitance on IO pin.  For more information on this topic, please refer and discuss under  https://community.nxp.com/t5/MCX-Microcontrollers/MCXA153-GPIO-rise-fall-time-performance/td-p/19885...

Hope this helps,

Jun Zhang

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ZhangJennie
NXP TechSupport
NXP TechSupport

Hi seanwu,

The LPCAC is disabled by default. For best performance, NXP recommends enabling it by clearing SYSCON->LPCAC_CTRL[DIS_LPCAC].

When enable LPCAC,  Performance of code running in Flash or FlexSPI Flash matches RAM performance because of LPCAC

This AN includes LPCAC usage. Enable/DIsable LPCAC to test MCX performance.

https://docs.nxp.com/bundle/AN14139/page/topics/mcx_n-series_architecture_overview.html

 

MCXA153 reference manual also introduces the low power cache controller control method.

ZhangJennie_0-1730884166403.png

You could refer it to test your IO performance. For more about IO performance, please refer your other thread “MCXA153 GPIO rise/fall time performance

Hope this helps,

Jun Zhang

 

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