LPTMR Interrupt is never called

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LPTMR Interrupt is never called

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jwolinski
Contributor II

Hello,

I have a project for frdmmcxn947 board. I'm not able to call an interrupt for LPTMR1.

jwolinski_0-1718270701274.png

 

 

 

const lptmr_config_t LPTMR1_config = {
  .timerMode = kLPTMR_TimerModeTimeCounter,
  .pinSelect = kLPTMR_PinSelectInput_0,
  .pinPolarity = kLPTMR_PinPolarityActiveHigh,
  .enableFreeRunning = true,
  .bypassPrescaler = false,
  .prescalerClockSource = kLPTMR_PrescalerClock_0,
  .value = kLPTMR_Prescale_Glitch_3
};

static void LPTMR1_init(void) {
  /* Initialize the LPTMR */
  LPTMR_Init(LPTMR1_PERIPHERAL, &LPTMR1_config);
  /* Set LPTMR period */
  LPTMR_SetTimerPeriod(LPTMR1_PERIPHERAL, LPTMR1_TICKS);
  /* Configure timer interrupt */
  LPTMR_EnableInterrupts(LPTMR1_PERIPHERAL, kLPTMR_TimerInterruptEnable);
  /* Interrupt vector LPTMR1_IRQn priority settings in the NVIC. */
  NVIC_SetPriority(LPTMR1_IRQN, LPTMR1_IRQ_PRIORITY);
  /* Enable interrupt LPTMR1_IRQn request in the NVIC. */
  EnableIRQ(LPTMR1_IRQN);
  /* Start the LPTMR timer */
  LPTMR_StartTimer(LPTMR1_PERIPHERAL);
}
/* LPTMR1_IRQn interrupt handler */
void LPTMR1_IRQHandler(void) {
  uint32_t intStatus;
  /* Reading all interrupt flags of status register */
  intStatus = LPTMR_GetStatusFlags(LPTMR1_PERIPHERAL);
  LPTMR_ClearStatusFlags(LPTMR1_PERIPHERAL, intStatus);

  /* Place your code here */
  lv_tick_inc(1);

  /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F
     Store immediate overlapping exception return operation might vector to incorrect interrupt. */
  #if defined __CORTEX_M && (__CORTEX_M == 4U)
    __DSB();
  #endif
}

 

 

 

Could you give me any advice?

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1,404 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

Pls try to run the LPTMR example code in SDK package

xiangjun_rong_0-1718329341958.png

You can download SDK package from the link:

https://mcuxpresso.nxp.com/en/welcome

 

Regarding your question, pls check the LPTMR>-CSR[TMS] bit in debugger, if it is 0, timer mode is selected, pls check if the 12MHz FRO clock is enabled. If the TMS bit is 1, counter mode is selected, it counts the external clock pad, pls check if you have inputted clock from the input pin.

BTW, pls set a break point in the ISR and check if you can enters the ISR.

Hope it can help you

BR

XiangJun Rong

 

1,389 Views
jwolinski
Contributor II

Hi,

Yes, indeed LPTMR>-CSR[TMS] is 0. 

jwolinski_0-1718352248143.png

jwolinski_1-1718352357116.png

12MHz FRO clock source is:  BOARD_BootClockPLL150M which is initalised:

void BOARD_InitBootClocks(void)
{
    BOARD_BootClockPLL150M();
}

 I've already set a break point in IRQ Handler and it does not work.

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1,349 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I have tested/modified your code, there are several error in the code.

Pls try to use the code:

Now, the ISR can be entered.

For your code,

The FRO-12M clock is not enabled

The LPTMR1 configuration has issue, I suppose you configure the LPTMR1 as counter which counts FRO_12M clock as tick. If you counts external pulse from pad, you have to modify yourself.

 

const lptmr_config_t LPTMR1_config = {

.timerMode = kLPTMR_TimerModeTimeCounter,

.pinSelect = kLPTMR_PinSelectInput_0,

.pinPolarity = kLPTMR_PinPolarityActiveHigh,

.enableFreeRunning = false,

.bypassPrescaler = true,

.prescalerClockSource = kLPTMR_PrescalerClock_0,

.value = kLPTMR_Prescale_Glitch_3

};

Pls have a try.

 

#include "fsl_device_registers.h"

#include "fsl_debug_console.h"

#include "pin_mux.h"

#include "clock_config.h"

#include "board.h"

 

#include "fsl_clock.h"

#include "fsl_lptmr.h"

/*******************************************************************************

* Definitions

******************************************************************************/

 

 

/*******************************************************************************

* Prototypes

******************************************************************************/

 

/*******************************************************************************

* Code

******************************************************************************/

/*!

* @brief Main function

*/

void LPTMR1_init(void);

uint32_t var;

int main(void)

{

char ch;

var=0;

/* Init board hardware. */

/* attach FRO 12M to FLEXCOMM4 (debug console) */

CLOCK_SetClkDiv(kCLOCK_DivFlexcom4Clk, 1u);

CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);

 

/* attach TRACECLKDIV to TRACE */

CLOCK_SetClkDiv(kCLOCK_DivTraceClk, 2U);

CLOCK_AttachClk(kTRACE_DIV_to_TRACE);

 

BOARD_InitPins();

BOARD_InitBootClocks();

BOARD_InitDebugConsole();

LPTMR1_init();

PRINTF("hello world.\r\n");

 

while (1)

{

ch = GETCHAR();

PUTCHAR(ch);

}

}

 

 

const lptmr_config_t LPTMR1_config = {

.timerMode = kLPTMR_TimerModeTimeCounter,

.pinSelect = kLPTMR_PinSelectInput_0,

.pinPolarity = kLPTMR_PinPolarityActiveHigh,

.enableFreeRunning = false,

.bypassPrescaler = true,

.prescalerClockSource = kLPTMR_PrescalerClock_0,

.value = kLPTMR_Prescale_Glitch_3

};

 

#define LPTMR1_PERIPHERAL LPTMR1

#define LPTMR1_TICKS 100000

#define LPTMR1_IRQ_PRIORITY 00

 

void LPTMR1_init(void)

{

SYSCON->CLOCK_CTRL|=1<<3;

/* Initialize the LPTMR */

LPTMR_Init(LPTMR1_PERIPHERAL, &LPTMR1_config);

/* Set LPTMR period */

LPTMR_SetTimerPeriod(LPTMR1_PERIPHERAL, LPTMR1_TICKS);

/* Configure timer interrupt */

LPTMR_EnableInterrupts(LPTMR1_PERIPHERAL, kLPTMR_TimerInterruptEnable);

/* Interrupt vector LPTMR1_IRQn priority settings in the NVIC. */

NVIC_SetPriority(LPTMR1_IRQn, LPTMR1_IRQ_PRIORITY);

/* Enable interrupt LPTMR1_IRQn request in the NVIC. */

EnableIRQ(LPTMR1_IRQn);

/* Start the LPTMR timer */

LPTMR_StartTimer(LPTMR1_PERIPHERAL);

}

 

/* LPTMR1_IRQn interrupt handler */

 

void LPTMR1_IRQHandler(void) {

uint32_t intStatus;

/* Reading all interrupt flags of status register */

intStatus = LPTMR_GetStatusFlags(LPTMR1_PERIPHERAL);

LPTMR_ClearStatusFlags(LPTMR1_PERIPHERAL, intStatus);

 

/* Place your code here */

//lv_tick_inc(1);

var++;

/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F

Store immediate overlapping exception return operation might vector to incorrect interrupt. */

#if defined __CORTEX_M && (__CORTEX_M == 4U)

__DSB();

#endif

}

 

 

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