Hiya
Ok that sounds plausible. Doesn't look like anything except reads here, but here you go (breakpoint was on main this time not the ResetISR)...
I have been looking at the start-up code that is presumably produced by the SDK for the actual board and I can't see where the actual SP is set anyway. There's an array called g_pfnVectors that is copied to the vector table offset register. The first element of this array is what the stack pointer should be set to (and I've checked this is correct), but nothing is being done with this value?
[14-1-2019 01:49:16] Executing Server: "C:\Program Files (x86)\SEGGER\JLink_V640\JLinkGDBServerCL.exe" -nosilent -swoport 2332 -select USB=260108640 -jlinkscriptfile C:\Projects\Nexus\Software\Source\Workspace\BRIGHTWELL_NEXUS_MDU_FW\scripts\evkbimxrt1050_sdram_init.jlinkscript -telnetport 2333 -singlerun -endian little -noir -speed auto -port 2331 -vd -device MCIMXRT1052 -if SWD -halt -reportuseraction
SEGGER J-Link GDB Server V6.40 Command Line Version
JLinkARM.dll V6.40 (DLL compiled Oct 26 2018 15:06:02)
Command line: -nosilent -swoport 2332 -select USB=260108640 -jlinkscriptfile C:\Projects\Nexus\Software\Source\Workspace\BRIGHTWELL_NEXUS_MDU_FW\scripts\evkbimxrt1050_sdram_init.jlinkscript -telnetport 2333 -singlerun -endian little -noir -speed auto -port 2331 -vd -device MCIMXRT1052 -if SWD -halt -reportuseraction
-----GDB Server start settings-----
GDBInit file: none
GDB Server Listening port: 2331
SWO raw output listening port: 2332
Terminal I/O port: 2333
Accept remote connection: localhost only
Generate logfile: off
Verify download: on
Init regs on start: off
Silent mode: off
Single run mode: on
Target connection timeout: 0 ms
------J-Link related settings------
J-Link Host interface: USB
J-Link script: C:\Projects\Nexus\Software\Source\Workspace\BRIGHTWELL_NEXUS_MDU_FW\scripts\evkbimxrt1050_sdram_init.jlinkscript
J-Link settings file: none
------Target related settings------
Target device: MCIMXRT1052
Target interface: SWD
Target interface speed: auto
Target endian: little
Connecting to J-Link...
$$UserActionStart$$: Terms of use
$$UserActionEnd$$: Terms of use
J-Link is connected.
Device "MCIMXRT1052" selected.
Firmware: J-Link V10 compiled Oct 26 2018 12:04:17
Hardware: V10.10
S/N: 260108640
OEM: SEGGER-EDU
Feature(s): FlashBP, GDB
Checking target voltage...
Target voltage: 3.27 V
Listening on TCP/IP port 2331
Connecting to target...Executing J-Link script file function: ConfigTargetSettings()
Config JTAG Speed to 4000kHz
Found SW-DP with ID 0x0BD11477
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x04770041)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FD000
CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)
Found Cortex-M7 r1p1, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ E00FD000
ROMTbl[0][0]: E00FE000, CID: B105100D, PID: 000BB4C8 ROM Table
ROMTbl[1] @ E00FE000
ROMTbl[1][0]: E00FF000, CID: B105100D, PID: 000BB4C7 ROM Table
ROMTbl[2] @ E00FF000
ROMTbl[2][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
ROMTbl[2][1]: E0001000, CID: B105E00D, PID: 000BB002 DWT
ROMTbl[2][2]: E0002000, CID: B105E00D, PID: 000BB00E FPB-M7
ROMTbl[2][3]: E0000000, CID: B105E00D, PID: 000BB001 ITM
ROMTbl[1][1]: E0041000, CID: B105900D, PID: 001BB975 ETM-M7
ROMTbl[1][2]: E0042000, CID: B105900D, PID: 004BB906 CTI
ROMTbl[0][1]: E0040000, CID: B105900D, PID: 000BB9A9 TPIU-M7
ROMTbl[0][2]: E0043000, CID: B105F00D, PID: 001BB101 TSG
Cache: Separate I- and D-cache.
I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
Enabling i.MXRT SDRAM
DCDC trim value loaded.
Clock Init Done
SDRAM Init Done
Executing J-Link script file function: ConfigTargetSettings()
Config JTAG Speed to 4000kHz
Found SW-DP with ID 0x0BD11477
AP map detection skipped. Manually configured AP map found.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FD000
CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)
Found Cortex-M7 r1p1, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ E00FD000
ROMTbl[0][0]: E00FE000, CID: B105100D, PID: 000BB4C8 ROM Table
ROMTbl[1] @ E00FE000
ROMTbl[1][0]: E00FF000, CID: B105100D, PID: 000BB4C7 ROM Table
ROMTbl[2] @ E00FF000
ROMTbl[2][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
ROMTbl[2][1]: E0001000, CID: B105E00D, PID: 000BB002 DWT
ROMTbl[2][2]: E0002000, CID: B105E00D, PID: 000BB00E FPB-M7
ROMTbl[2][3]: E0000000, CID: B105E00D, PID: 000BB001 ITM
ROMTbl[1][1]: E0041000, CID: B105900D, PID: 001BB975 ETM-M7
ROMTbl[1][2]: E0042000, CID: B105900D, PID: 004BB906 CTI
ROMTbl[0][1]: E0040000, CID: B105900D, PID: 000BB9A9 TPIU-M7
ROMTbl[0][2]: E0043000, CID: B105F00D, PID: 001BB101 TSG
Cache: Separate I- and D-cache.
I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
Enabling i.MXRT SDRAM
DCDC trim value loaded.
Clock Init Done
SDRAM Init Done
Connected to target
Waiting for GDB connection...Connected to 127.0.0.1
Reading all registers
Read 4 bytes @ address 0x0020C746 (Data = 0x6148F8D0)
Read 2 bytes @ address 0x0020C746 (Data = 0xF8D0)
Received monitor command: reset
Executing J-Link script file function: ResetTarget()
J-Link script: ResetTarget()
DP0: 0x0BD11477
DP1: 0xF0000040
AHB-AP0: 0x03000042
AHB-AP1: 0xE000EDF0
AHB-AP3: 0x00030003
AHB-AP3: 0x00030003
DCDC trim value loaded.
Clock Init Done
SDRAM Init Done
Resetting target
Downloading 16128 bytes @ address 0x80000000 - Verified OK
Downloading 6352 bytes @ address 0x80003F00 - Verified OK
Downloading 4 bytes @ address 0x800057D0 - Verified OK
Writing register (PC = 0x80000304)
Read 4 bytes @ address 0x80000304 (Data = 0xB672B510)
Reading all registers
Read 4 bytes @ address 0x80000304 (Data = 0xB672B510)
Reading 64 bytes @ address 0x80000540
Read 2 bytes @ address 0x80000552 (Data = 0xF001)
Received monitor command: semihosting enable
Semi-hosting enabled (Handle on BKPT)
Received monitor command: exec SetRestartOnClose=0
Executed SetRestartOnClose=0
Setting breakpoint @ address 0x80000552, Size = 2, BPHandle = 0x0001
Starting target CPU...
...Breakpoint reached @ address 0x80000552
Reading all registers
Removing breakpoint @ address 0x80000552, Size = 2
Read 4 bytes @ address 0x80000552 (Data = 0xFB19F001)
Reading register (MSP = 0x20200F60)
Reading register (PRIMASK = 0x 0)
Reading register (PSP = 0x 0)