Hi Erich,
Thanks for your quick reply. We are using a very old version of the MIMXRT1050 EVK board. It is using the A0 Silicon obsolete version. We are hoping to get a newer version soon for testing. We bought this last year but are first looking at it now as our current processor LPC3240 is nearing the end of its life. We are hoping this crossover processor will be a good replacement. After posting my question I was looking around this forum and found the document " Using the MIMXRT1050-EVK(B) with MCUXpresso IDE v10.2.1" which sounds similar to the one you mention. I saw where it was describing my issue as possibly being related to the Hyperflash and recommending to erase it. I was going to try that when I saw your response. My question is that if you do erase the Hyperflash image how does the board boot? Isn't that the startup code for the development board? Below is the error message when trying to flash the board with the "Hello World" build. Thanks....
MCUXpresso IDE RedlinkMulti Driver v10.2 (Jul 25 2018 11:25:37 - crt_emu_cm_redlink build 555)
Found chip XML file in C:/iMX1050RT/temp/evkmimxrt1050_hello_world/Debug\MIMXRT1052xxxxx.xml
Reconnected to existing link server
Connecting to probe 1 core 0:0 (using server started externally) gave 'OK'
Probe Firmware: DAPLink CMSIS-DAP (ARM)
Serial Number: 0227000041114e45004b300dc40300495ab1000097969900
VID:PID: 0D28:0204
USB Path: \\?\hid#vid_0d28&pid_0204&mi_03#7&21936f32&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}
Using memory from core 0:0 after searching for a good core
debug interface type = Cortex-M7 (DAP DP ID 0BD11477) over SWD TAP 0
processor type = Cortex-M7 (CPU ID 00000C27) on DAP AP 0
number of h/w breakpoints = 8
number of flash patches = 0
number of h/w watchpoints = 4
Probe(0): Connected&Reset. DpID: 0BD11477. CpuID: 00000C27. Info: <None>
Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.
Content of CoreSight Debug ROM(s):
RBASE E00FD000: CID B105100D PID 000008E88C ROM dev (type 0x1)
ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM dev (type 0x1)
ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM dev (type 0x1)
ROM 3 E000E000: CID B105E00D PID 04000BB00C ChipIP dev SCS (type 0x0)
ROM 3 E0001000: CID B105E00D PID 04000BB002 ChipIP dev DWT (type 0x0)
ROM 3 E0002000: CID B105E00D PID 04000BB00E ChipIP dev (type 0x0)
ROM 3 E0000000: CID B105E00D PID 04000BB001 ChipIP dev ITM (type 0x0)
ROM 2 E0041000: CID B105900D PID 04001BB975 ARCH 23B:4A13r0 CoreSight dev type 0x13 Trace Source - core
ROM 2 E0042000: CID B105900D PID 04004BB906 CoreSight dev type 0x14 Debug Control - Trigger, e.g. ECT
ROM 1 E0040000: CID B105900D PID 04000BB9A9 CoreSight dev type 0x11 Trace Sink - TPIU
ROM 1 E0043000: CID B105F00D PID 04001BB101 System dev (type 0x0)
CM7 Rev. 7.0 DTCM: 512KB ITCM: 512KB
LoUU: Level 2: LoC: Level 2
Level 1 Cache Type: Instruction+Data
ICache 32K: WT: Y WB: Y RA: Y WA: Y NumSets: 512 Assoc: 2 LineSize: 8
DCache 32K: WT: Y WB: Y RA: Y WA: Y NumSets: 256 Assoc: 4 LineSize: 8
Inspected v.2 External Flash Device on SPI MIMXRT1050-EVK_S26KS512S.cfx
Image 'MIMXRT1050-EVK_S26KS512SOct 19 2017 16:37:47'
Opening flash driver MIMXRT1050-EVK_S26KS512S.cfx
Sending VECTRESET to run flash driver
core registers failed - rc Ep(08). Cannot access core regs when target running.
chip initialization failed - Ep(08). Cannot access core regs when target running.
failed to find a target memory area to use to test the Debug Access Port
Non-standard DAP stride detected - 1024 bytes
required information about vendor NXP chip MIMXRT1052xxxxx not found
Failed on chip setup: Ec(01). Invalid part, XML, or configuration.