Thank you for your answer, Marek.
Regarding the Fractional baud rate generator, if the following remark is to be taken seriously, it will be not possible to use it with without the FRO oscillator.
Remark: When the FRG is used to create a clock for use by one or more Flexcomm
Interfaces (the typical use of the FRG), the FRG output frequency should not be higher
than 48 MHz.
I'm using the Fractional Baud Rate Generator at 110215264Hz (main clock at 220MHz "drived" by an external 12MHz crystal and FRGCTRL= 0xFFFF), and, so far, it seems to working without problems. So, why the 48MHz limit?
And, by the way, there is a least one fix that needs to be made in the fsl_clock.c driver. That is:
In the uint32_t CLOCK_GetFrgClkFreq(void) function, you are not taking in to account the FRGCTRL content. This function is returning the same value as the uint32_t CLOCK_GetFRGInputClock(void) function
It needs to be changed from this
uint32_t CLOCK_GetFRGInputClock(void)
{
uint32_t freq = 0U;
switch (SYSCON->FRGCLKSEL)
{
case 0U:
freq = CLOCK_GetCoreSysClkFreq();
break;
case 1U:
freq = CLOCK_GetPllOutFreq();
break;
case 2U:
freq = CLOCK_GetFro12MFreq();
break;
case 3U:
freq = CLOCK_GetFroHfFreq();
break;
default:
break;
}
return freq;
}
to something like this:
uint32_t CLOCK_GetFrgClkFreq(void)
{
uint32_t freq = 0U;
switch (SYSCON->FRGCLKSEL)
{
case 0U:
freq = (CLOCK_GetCoreSysClkFreq() / (1.0 + (float)((SYSCON->FRGCTRL & 0XFF00) >> 8) / ((SYSCON->FRGCTRL & 0X00FF) + 1.0)));
break;
case 1U:
freq = (CLOCK_GetPllOutFreq() / (1.0 + (float)((SYSCON->FRGCTRL & 0XFF00) >> 8) / ((SYSCON->FRGCTRL & 0X00FF) + 1.0)));
break;
case 2U:
freq = (CLOCK_GetFro12MFreq() / (1.0 + (float)((SYSCON->FRGCTRL & 0XFF00) >> 8) / ((SYSCON->FRGCTRL & 0X00FF) + 1.0)));
break;
case 3U:
freq = (CLOCK_GetFroHfFreq() / (1.0 + (float)((SYSCON->FRGCTRL & 0XFF00) >> 8) / ((SYSCON->FRGCTRL & 0X00FF) + 1.0)));
break;
default:
break;
}
return freq;
}
