TWR-LS1021A gpio

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TWR-LS1021A gpio

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leonidandronov2
Contributor I

We are using TWR-LS1021A in our projects and we need to get at least two usable GPIO pins to make some simple LED indication.

As seen from the scheme of external connectors there are several "gpio" pins from FPGA/CPLD and maybe just 2 pins from ls1021a processor (GPIO3_13 and GPIO3_14).

We are using Yocto 1.7 SDK. It seems that in kernel configuration there are enabled options for controlling gpios via sysfs. Assuming that GPIO3_14 in sysfs mapped to gpio174 we tried to do something like

echo 174 > /sys/class/gpio/export

echo out > /sys/class/gpio174/direction

echo 1 > /sys/class/gpio174/value

echo 0 > /sys/class/gpio174/value

But there is no activity on board's external pin.

So the questions are:

1) Is it correct mapping for GPIO3_14 in sysfs?

2) Do we need to do something else to use sysfs for controlling those two gpios (maybe rcw or dts editing)?

3) Is there a way to access to FPGA/CPLD gpio register and what we need to do for it?

Thank you in advance!

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Pavel
NXP Employee
NXP Employee

Check RCW on your board. Check EC1 setting (bits 416-418) of the RCW. See the Table 3-11 and the Table 4-14 of the LS1021A Reference Manual.

Usually the EC1 is set to 2 in the SDK. Change this setting to 1.


Have a great day,
Pavel

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2,507 次查看
Pavel
NXP Employee
NXP Employee

Check RCW on your board. Check EC1 setting (bits 416-418) of the RCW. See the Table 3-11 and the Table 4-14 of the LS1021A Reference Manual.

Usually the EC1 is set to 2 in the SDK. Change this setting to 1.


Have a great day,
Pavel

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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