SPI AS RGMII MANAGEMENT INTERFACE

[prabinca4u]

Hi

I'm Working On LS1021A-IOT board REF board (REV 1), SDK V1.8. My current task is to bring up RGMII interface on LS1021A-IOT board.It uses dspi for managing the RGMII, The RGMII is eTSEC3. But RGMII is never working on my board. I tried to access RGMII register via SPI, but I didn’t get any response from RGMII. Do I need further configuration for setting up SPI as RGMII management interface(In device tree or kernel driver).

Thanks In advance

[dineshkumarpara]

Hi Prabin,

How do you configure the RTL8365MB switch  in the SDK (via kernel, device tree or application)

[arunkr]

Hi Prabin,

I am also facing issue with RGMII interface on LS1021AIOT (Rev 1) reference board. (Yocto SDK v1.8, board schematic REV B3).

The reference SDK is downloaded from Freescale/NXP portal for this reference board, and by default the the Realtek switch should work with this image. But it doesn't. 

The eth2 connected switch is configured in RGMII mode in hardware, and in RCW, device tree also. The management bus is SPI, not MDIO unlike eth0 and eth1 (In eth0 and eth1 management bus is MDIO, and data bus is SGMII configuration). But on 'ethtool eth2' command, in fsl-image-rds image it shows interface supported is MII. I dont know whats the issue..

[Pavel]

Look at attached file. Find the rtlinit in this file.

Have a great day,
Pavel

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[prabinca4u]

Hi Now i'm able to configure Registers of RGMII switch via SPI, And able to send TX data and TX clock (125 MHZ) from ETSEC to RGMII switch, But not coming data out from RGMII switch to LAN Port. Similarly not getting RX clock and RX data from RGMII switch to ETSEC (while pinging from My host PC to LS1 board).

Please Advice me......!

[Pavel]

Check the RCW for your processor.

Is the EC3 correctly on your board?

Is the TSEC3 enabled on your board?

Test the TSEC on your board using internal loopback. See the Section 20.9.3.13 of the LS1021A Reference Manual.

Have a great day,
Pavel

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[prabinca4u]

Hi Pavel

eTSEC3 is already enabled in RCW (RCW_422_424 = 000) and Internal hardware Loop backing of eTSE3 is working in MAC(LS1021A-IOT) side fine.

I'm getting the given print from kernel when do internal loop back "received packet on eth2 with own address as source address"

The processor side seems to okei for RGMII

Then what may be the problem.???

Thanks

[prabinca4u · Accepted solution]

The RGMII issue is solved by configuring RTL8365MB switch.

[wilkxt]

Hi

How you configuring RTL8365MB ?

[prabinca4u]

Thanks Pavel ​ Let me try this....

[prabinca4u]

Hi

Thanks Mr Arun For putting this queries also. I'm also thinking that is the problem.

[dhruvalpatel]

Hi ,

I am working on similar product based on ls1021aiot based design but we are using broadcom switch and we don't have any other interface. Is there a way to configure switch at u-boot. I will appreciate any pointers.

Thanks in Advance !!