Hello, everyone!
I kindly ask for help with pci express controller on ls1012a.
My company developed a custom design board with a ls1012a cpu at heart.
This board is designed to work with PC, so it has a pci-e x1 male plug(as usual GPU board for example).
The problem is: it does not perform link training. LTSSM is in Polling.Compliance state.
I have:
- two custom boards
- ls1012ardb eval board
- two pci-e raisers
- minipci-e wifi module from a notebook
- handmade adaptor from minipci-e-female to pci-e-male (to connect ls1012ardb to PC)
What i have done:
I managed to build bl2 and fip_uboot binaries with flex-builder and flash them
to QSPI flash of my custom board.
So the board starts and i am able to load linux. DDR/USB/i2s/spi are ok.
I made one of my custom boards as a root-complex and the other as an endpoint and connected them
to each other via raisers and they do perform link training, and the LTSSM is L0.
I but if i connect my custom board made as root-complex to wifi module - LTSSM state is Polling.Compliance.
I made a minor changes in rcw(serdes protocol on my custom board is 3305 and i changed it to 3508 for eval board)
and loaded my bl2/fip binaries to BANK2 of ls1012ardb qspi flash. It also starts ok.
I made ls1012ardb as a root-complex and connected it via handmade-adapter and raisers to a
wifi module and they do see each other and perform link training. Also ls1012ardb performs link training
with my custom board(custom board made as an endpoint).
LS1012ARDB made as an endpoint and connected to PC via adapter does not perform link training and LTSSM is Polling.Compliance.
Summary:
- All ls1012a cpu in my possession can work with each other via pci-e.
- None of them can work with PC.
- Only cpu on ls1012ardb can work as root-complex with none-ls1012a endpoint.
There is a chance that the problem is in electrician/circuit technique.
But i would like to exclude software problems before standing my ground.
So are this statements correct?
- initial initialisation of pci-e controller is done by pre-bootloader and depends on RCW
- link training is performed automatically after power up and minimal initialization
and if rcw is correct, no problems should occure
A file with an RCW, PLL and SerDes register values is attached.
Thank, you=)