LS1012 boot

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LS1012 boot

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Filippo
Contributor III

Hi,
on a custom LS1012 board we are facing this issue : clocks and resets ( both the PORESET_B and TRST_B ) come from the same source and are fine, RCW source ( CLK_OUT ) is open / pulled up to 1.8V , QSPI_A_CS0 and QSPI_A_DATA1 are pulled down to 0 to select the external oscillator, but we can't see any activity on QSPI to load RCW.
Powers are within the ranges, JTAG is enabled with TCK pulled high with a 4.7k to 1.8V.

Anybody has hints about this?
We have not yet tried with JTAG, can this be of some help?
Thanks and regards

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Filippo
Contributor III

Just a quick update : we worked to have exactly the same power scheme the freedom board has, so the MC34VR5100A1EP is powered from the same 3.3V that goes to the LS1012 EVDD pin ( 159 ). The difference we see is the freedom PMIC is a MC34VR5100A0EP but our is a MC34VR5100A1EP, indicating that sequences and voltages may be different ( maybe ? ). Reset in our board is some 600 mSec. ( specs says more than 300 mSec. ).
Regards

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Filippo
Contributor III

Alexander,
sorry for the late reply, we managed to have three reworked board with new processors.
The cfg_eng_use and cfg_eng_use2 pins are tied to "11" with a pullup to select the external oscillator.
With these new processors we have a stable situation in wich pushing reset the board starts activity on SPI, but not at power on. Power supply sequences are from MC34VR5100A1EP, powered @ 3.7V.
Even maintainig pushed the reset button at power on and then releasing it the board doesn't boot, we need a full reset cycle to start activity on SPI.
Additionally, the time from the release of the reset to SPI activity is different from the one on the freedom board : on the freedom, when we release the reset button, activity starts within some 300 uSec., on our board there are more than 3 mSec. of delay.
Our suspect is we have a floating pin somewhere, but looking at the specs we can't find it, and everything is pulled up/down as per data sheet and application notes.
Do you know if someone have ever seen this behavior before?

Thank you and regards

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alexander_yakov
NXP Employee
NXP Employee

There is nothing mentioned about cfg_eng_use and cfg_eng_use2 pins. According to LS1012 Reference Manual, Section 4.4.4.2 "Transconductance selection control", these pins should be "11" for external oscillator. Note that internal weak pull-up may be not adequate, if there is any device connected to these pins.


Have a great day,
Alexander
TIC

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Filippo
Contributor III

Hi Miguel,

sure, difficult...
Just to clarify : I have no QSPI connected, QSPI_A_CS0 and QSPI_A_DATA1 are pulled down with a 10K res, EXTAL is connected to a 1.8V clock source @ 25MHz and XTAL is connected to GND, but I can't see any clock to the QSPI nor chip select or other signals.

QSPI_A_DAT2 is pulled up with a 4.7K and SDHC1_CD_B is pulled up with a 4.7K.

We have the same behavior on 5 boards.

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zmlopez
Contributor III

Hi,

It's difficult to say without seeing your schematics.

You could try to see in the oscilloscope the configuration signals (QSPI_A_CS0 , QSPI_A_DATA1, CLK_OUT) and EXTAL when PORESET_B goes up. Is the QSPI in reset in that moment? Has it clock?.

Maybe a fabrication problem: a signal not connected. You could test if you could see the protection diodes with a tester in configuration signals inputs and compare it with development board behaviour (the problem is that you also see the QSPI protection diodes in that signals).

Hope it helps.

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