Hello.
We making a custom board by referring to LS1043A. Booting is the same as the reference board, and it seems to be boot from SDHC.
But after booting into Linux, we need to read/write data to SRAM.
In this case, there are two questions.
1. how to change the device tree?
In general, the device tree as follows:
&ifc {
status = "okay";
#address-cells = <2>;
#size-cells = <1>;
/* NOR, NAND Flashes and FPGA on board */
ranges = <0x0 0x0 0x0 0x60000000 0x08000000
0x1 0x0 0x0 0x7e800000 0x00010000
0x2 0x0 0x0 0x7fb00000 0x00000100>;
nor@0,0 {
compatible = "cfi-flash";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0 0x0 0x8000000>;
big-endian;
bank-width = <2>;
device-width = <1>;
};
nand@1,0 {
compatible = "fsl,ifc-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x1 0x0 0x10000>;
};
cpld: board-control@2,0 {
compatible = "fsl,ls1043ardb-cpld";
reg = <0x2 0x0 0x0000100>;
};
};
But if use SRAM instead of NAND, How to modified? Especially compatible.
Second, if the device is recognized by IFC, how should it be used?
Previously, it was recognized as MTD but SRAM needs to input/output raw data. Can I use it as it is?
Best regards.
Thanks.
Solved! Go to Solution.
SRAM should be connected to IFC in GPCM mode, but we don't have GPCM driver for ARM processors. You need to develop by yourself. You can take eLBC/GPCM driver for PowerPC as reference.
SRAM should be connected to IFC in GPCM mode, but we don't have GPCM driver for ARM processors. You need to develop by yourself. You can take eLBC/GPCM driver for PowerPC as reference.