CodeWarrior TAP Connecting Issues LS1021a

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CodeWarrior TAP Connecting Issues LS1021a

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jiye
Contributor V

(1) Debug Mode Bareboard Project:

I connected my  TWR-LS1021a eva board via CodeWarrior Tap and to my PC 

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When I ran into debug mode it throws me this error.

(2) QorIQ Configuration Project:

I am trying to read the PBL from the eva board but it says ls1020A: Core not responding even tho I choose the processor is called ls1021A I dont know why it tells me 1020 

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then I did a loop test and it shows me :

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I am using Version: 2.0 of the CPU

CPU:   Freescale LayerScape LS1021E, Version: 2.0, (0x87081120)

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Elias Bitbaker,

1. Please check whether CodeWarrior license is valid from Help->NXP Semiconductors License.

2. Please open C:\Freescale\CW4NET_v2017.03_armv7\Common\CCS\bin\ccs.exe to check CodeWarrior TAP.

(bin) 49 % delete all
(bin) 50 % config cc cwtap
(bin) 52 % show cc
CodeWarrior TAP executable differs from local file.
CodeWarrior TAP Boot Loader version 1.0.1
CodeWarrior TAP OS version 1.0.4
Sending code to CodeWarrior TAP.........done
Running package script
0

0: CodeWarrior TAP (cwtap) CC software ver. {0.0}

3. In CodeWarrior IDE, please enable CCS and capture CCS log to me to do more investigation.

Please enable CCS log from "Run->Debug Configurations-><project>-core0_RAM_<processor>-Connect(Download)->Edit...->Advanced->Advanced CCS setting->Enable logging", and connect to the target from "Run->Debug Configurations-><project>-core0_RAM_<processor>-Connect(Download)->Debug”, the CCS log will be displayed in the console panel in CodeWarrior IDE.
If the CCS log in the console is truncated, please enlarge the console buffer from Window->Preferences->Run/Debug->Console->uncheck "Limit console output".
(Please open the console panel from Window->Show View->Console, and if nothing displayed, please choose the correct session on the right top icon in the panel.)

Thanks,

Yiping

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jiye
Contributor V

after I did what you said 

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License are all correct:

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Output from debug console:

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ccs_open
ipaddr = 127.0.0.1
port = 41475
timeout = 60
serverh = 0
ccs_open; ccs_error = 0
ccs_get_connection_count
serverh = 0
count = 1
ccs_get_connection_count; ccs_error = 0
ccs_available_connections
serverh = 0
count = 0
ccs_available_connections; ccs_error = 0
ccs_available_connections
serverh = 0
count = 0
ccs_available_connections; ccs_error = 0
ccs_config_cc
serverh = 0
config_string = cwtap:0
ccs_config_cc; ccs_error = 0
ccs_available_connections
serverh = 0
count = 1
ccs_available_connections; ccs_error = 0
ccs_cc_version
serverh = 0
cc = 0
version.major = 0
version.minor = 0
ccs_cc_version; ccs_error = 0
ccs_set_timeout
serverh = 0
timeout = 60
ccs_set_timeout; ccs_error = 0
ccs_get_config_chain
serverh = 0
device_list: (size = 0)
ccs_get_config_chain; ccs_error = 0
ccs_config_server
serverh = 0
cc = 0
server_config = 0
value = 10000
ccs_config_server; ccs_error = 0
ccs_config_chain
serverh = 0
cc = 0
device_list: (size = 3)
device[0]:: core_type=LS1020A(273)
device[1]:: core_type=DAP(232)
device[2]:: core_type=SAP2(272)
ccs_config_chain; ccs_error = 0
ccs_get_config_chain
serverh = 0
device_list: (size = 3)
ccs_get_config_chain; ccs_error = 0
ccs_get_config_chain
serverh = 0
device_list: (size = 3)
device[0]:: core_type=LS1020A(273)
device[1]:: core_type=DAP(232)
device[2]:: core_type=SAP2(272)
ccs_get_config_chain; ccs_error = 0
ccs_available_connections
serverh = 0
count = 1
ccs_available_connections; ccs_error = 0
ccs_delete_cc
serverh = 0
count = 0
ccs_delete_cc; ccs_error = 0
ccs_close
serverh = 0
ccs_close; ccs_error = 0

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yipingwang
NXP TechSupport
NXP TechSupport

Please refer to the section "8.4 Setting up a remote system to use a JTAG configuration file" in CW_ARMv7\ARMv7\Help\PDF\CW_ARMv7_Targeting_Manual.pdf to use JTAG configuration file to override RCW.

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jiye
Contributor V

also do you know why when I checked the Initialize target in the debug configuration I am not able to click the OK button

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jiye
Contributor V

so I tried this tap on the TWR-ls1021a eva board it can get into the debug mode.

but when I connect this tap to my ls1021a prototype it's not detecting. What is the requirement for the ls1021a to detect the codewarrior tap such as DDR,PMIC etc. interfaces have to be enabled first ?

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Elias Bitbaker,

Please refer to the table "Table 4-15. Hard-coded RCW options" in LS1021 Reference manual to configure your custom board as hard-coded RCW.

In addition, please configure the Initialize target script as CW_ARMv7\ARMv7\ARM_Support\Configuration_Files\LS1021A\LS1021A_TWR_OCRAM_Init.tcl.

If your problem remains, please capture CCS console log to me again.


Have a great day,
TIC

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jiye
Contributor V

Have this error now :

=============================================================================

fl::target -lc "Boot1129-core0_OCRAM_LS1021ATWR_Download"
fl::target -b 0x80000000 0x100000
fl::target -v on -l off
cmdwin::fl::device -d "SDSP16GB" -o "2048Mx8x1" -a 0x0 0x47fffffff
cmdwin::fl::image -f "D:\\CodeWarriorWorkPlace\\RCW-eMMC-PBL-Images\\PBL.bin" -t "Auto Detect" -re off -oe on -o 0x1000
cmdwin::fl::verify
Beginning Operation ...
-------------------------
Verifying file D:\CodeWarriorWorkPlace\RCW-eMMC-PBL-Images\PBL.bin
Auto-detection is successful.
File is of type Binary/Raw Format.

Performing target initialization ...
Downloading Flash Device Driver ...
Error: Couldn't write flash driver to target. Can not read target memory at location: 0x0000000080000000.Please make sure that the chip selects are properly configured.
The CWPP response code is: CCSProtocolPlugin : CCS: Scan timeout.
Error: Couldn't write flash driver to target.Can not read target memory at location: 0x0000000080000000.
Please make sure that the chip selects are properly configured.
The CWPP response code is: CCSProtocolPlugin : CCS: Scan timeout.
fl::target -lc "Boot1129-core0_OCRAM_LS1021ATWR_Download"
fl::target -b 0x80000000 0x100000
fl::target -v on -l off
cmdwin::fl::device -d "SDSP16GB" -o "2048Mx8x1" -a 0x0 0x47fffffff
cmdwin::fl::image -f "D:\\CodeWarriorWorkPlace\\RCW-eMMC-PBL-Images\\PBL.bin" -t "Auto Detect" -re off -oe on -o 0x1000
cmdwin::fl::verify
Beginning Operation ...
-------------------------
Verifying file D:\CodeWarriorWorkPlace\RCW-eMMC-PBL-Images\PBL.bin
Auto-detection is successful.
File is of type Binary/Raw Format.

Performing target initialization ...
Downloading Flash Device Driver ...
Error: Couldn't write flash driver to target. Can not read target memory at location: 0x0000000080000000.Please make sure that the chip selects are properly configured.
The CWPP response code is: CCSProtocolPlugin : CCS: Scan timeout.
Error: Couldn't write flash driver to target.Can not read target memory at location: 0x0000000080000000.
Please make sure that the chip selects are properly configured.
The CWPP response code is: CCSProtocolPlugin : CCS: Scan timeout.
fl::target -lc "Boot1202-core0_RAM_LS1021ATWR_Download"
fl::target -b 0x80000000 0x100000
fl::target -v on -l off
cmdwin::fl::device -d "SDSP16GB" -o "2048Mx8x1" -a 0x0 0x47fffffff
cmdwin::fl::image -f "D:\\CodeWarriorWorkPlace\\RCW-eMMC-PBL-Images\\PBL.bin" -t "Auto Detect" -re off -oe on -o 0x1000
cmdwin::fl::verify
Beginning Operation ...
-------------------------
Verifying file D:\CodeWarriorWorkPlace\RCW-eMMC-PBL-Images\PBL.bin
Auto-detection is successful.
File is of type Binary/Raw Format.

Performing target initialization ...
Downloading Flash Device Driver ...
Reading flash ID ...
Auto-detection is successful.
File is of type Binary/Raw Format.

Downloading 0x00010000 at address 0x80004048
Writing verify function code
Running ...
Reading verify status
Data Mismatch at address: 00001018. Expected: 0x40. Actual: 0x30
Data Mismatch at address: 0000101C. Expected: 0x08. Actual: 0x00
Data Mismatch at address: 0000101D. Expected: 0x40. Actual: 0x00
Data Mismatch at address: 0000101E. Expected: 0xB9. Actual: 0x79
Data Mismatch at address: 00001022. Expected: 0x4A. Actual: 0x0A
Data Mismatch at address: 00001038. Expected: 0x20. Actual: 0x00
Data Mismatch at address: 00001039. Expected: 0x02. Actual: 0x08
Data Mismatch at address: 0000103A. Expected: 0x48. Actual: 0x00
Data Mismatch at address: 0000103D. Expected: 0x07. Actual: 0x1B
Data Mismatch at address: 0000126C. Expected: 0x30. Actual: 0x70
Error: Verify failed. At least 10 data mismatches occur.

Error: Verify failed.At least 10 data mismatches occur.

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jiye
Contributor V

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Elias Bitbaker,

According to your console log, it seems that the flash programming algorithm can be executed successfully.

In "Initialization" panel, please configure initialize target script as "Boot1202-core0_RAM_LS1021ATWR_Download" to check whether the CodeWarrior can connect to the target board.

Thanks,

Yiping

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jiye
Contributor V

(1)Can you tell me if this error indicates that my ls1021a (standalone) is able to detect the JTAG interface ?

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ccs_open
    ipaddr = 127.0.0.1
    port = 41475
    timeout = 60
    serverh = 0
    ccs_open; ccs_error = 0
ccs_get_connection_count
    serverh = 0
    count = 1
    ccs_get_connection_count; ccs_error = 0
ccs_available_connections
    serverh = 0
    count = 1
    ccs_available_connections; ccs_error = 0
ccs_available_connections
    serverh = 0
    count = 1
    ccs_available_connections; ccs_error = 0
ccs_cc_version
    serverh = 0
    cc = 0
    version.major = 0
    version.minor = 0
    ccs_cc_version; ccs_error = 0
ccs_set_timeout
    serverh = 0
    timeout = 60
    ccs_set_timeout; ccs_error = 0
ccs_get_config_chain
    serverh = 0
    device_list: (size = 0)
    ccs_get_config_chain; ccs_error = 0
ccs_config_server
    serverh = 0
    cc = 0
    server_config = 0
    value = 10000
    ccs_config_server; ccs_error = 0
ccs_config_chain
    serverh = 0
    cc = 0
    device_list: (size = 3)
        device[0]:: core_type=LS1020A(273)
        device[1]:: core_type=DAP(232)
        device[2]:: core_type=SAP2(272)
    ccs_config_chain; ccs_error = 0
ccs_write_register
    coreh = [serverh:0;cc_index:0;chain_pos:0]
    index = 0
    count = 1
    size = 4
    value: (size = 4)
         0000009B
    ccs_write_register; ccs_error = 0; duration=9 ms
ccs_config_template
    coreh = [serverh:0;cc_index:0;chain_pos:0]
    config_reg = 4096
    config_data = 1
    ccs_config_template; ccs_error = 0
ccs_reset_to_debug
    serverh = 0
    cc = 0

Also I want  to confirm that if LS1021ATWR file is applicable to my ls1021a standalone chip as well.

This file \LS1021A_TWR_OCRAM_Init.tcl

(2) Do I have to use hard coded option? If so can you tell me where I am missing

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this works on my TWR-ls1021a board but not on my ls1021a stand alone board

my ls1021a version of my board is ls1021ASE7KQB wonder if this is equivalent to version 2.0

(3) I think the best option is to use OCRAM since it only has an external eMMC on my board is that correct ? RAM option should not be applicable.

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jiye
Contributor V

Now I followed the ls1021a reference manual the section 4.4.6.2 and change required settings to match the hard coded option the try to use debug mode again it shows me this Invalid parameter error this time

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yipingwang
NXP TechSupport
NXP TechSupport

Hello Elias Bitbaker,

Please refer to "Table 4-15. Hard-coded RCW options" to configure cfg_rcw_src[0:8] to configure you custom board in a suitable hard-coded RCW mode.

The open CCS console and type the command "source IDcode.tcl".

(bin) 50 % source IDcode.tcl

 

Scanning for available TAPs connected via USB.....

 

 

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

+

+      Available Remote Connections

+

+   1 -  CodeWarriorTAP  -  00:04:9f:04:e4:b2

+   2 -  CodeWarriorTAP  -  <Specify IP Address>

+   3 -  GigabitTAP  -  <Specify IP Address>

+

+   x  - Exit Script without Changes

+

++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

 

Specify connection:

1

 

Configuring TAP Interface....

 

Configured Connection: cwtap : 00:04:9f:04:e4:b2

 

 

TDO -----

        |

        * Device 0  IDCODE: 5BA00477  Device: ARM DAP rev 5.x

        * Device 1  IDCODE: 06B2001D  Device: NXP LS1012A rev 1.x

        |

TDI -----

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jiye
Contributor V

Hi Yiping,

Could you provide me all hard-coded files since I only have 9b under jtag chain directory

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all of them are 0x9b I want 9a, 9c, 9d, 9e and 9f as well

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yipingwang
NXP TechSupport
NXP TechSupport

Please modify the switch setting on the target board to configure hard-coded RCW.

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jiye
Contributor V

(1)where can I find the hard-coded RCW ? also by saying this you mean I flash the hard-coded RCW first to boot the device and then flash my own PBL (which has my customized RCW) later?

(2)do I have to follow this hard-coded method if there is nothing in my eMMC? Can I just use the LSDK to create spl.bin (which has rcw and uboot) then flash this into the eMMC?

(3) The file I am using is 

source lsbp.tcl

source ddr-init-ls1021twr.tcl

Then i got the following errors:

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then I checked the script

I do have the right mac address

config cc cwtap:fsl063ac3

also 

I got an error for this too 

ccs::config_chain "$dut dap sap2"

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(4)

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is this u-boot.bin is the same one I compiled using LSDK ? 

uboot_ls1021atwr_sdcard_qspi.bin

what am I suppose to please help......................

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jiye
Contributor V

still failed after I followed exactly the steps the target manual told me 

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jiye
Contributor V

do you have any ideas why I had that issue in the previous thread?

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