25.4.3 Booting methods (extract from the LS1043ARM)
Booting can be performed from NAND or NOR flash on the IFC.
• NOR is directly memory-mapped, so booting from NOR can be done as simple read
operations without any special arrangements. Default timing parameters are loaded
with the assertion of rcw_load/boot_load, details of this requirement is explained in
NOR boot.
• NAND is not directly memory-mapped, so the boot code is loaded first into an
SRAM buffer from where the code can be executed. See NAND flash control
machine for more information about booting from NAND.
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PreBoot loader (PBL) and nonvolatile memory interfaces
The PBL functions include the following:
• Simplifies boot operations, replacing pin strapping resistors with configuration data
loaded from nonvolatile memory
• Uses the configuration data to initialize other system logic and to copy data from low
speed memory interfaces IFC, QuadSPI, and SD/eSDHC/eMMC) into fully
initialized DDR or OCRAMs.
• Releases CPU 0 from reset, allowing the boot processes to begin from fast system
memory
to grasp into boot flow please review the LLDP user guide section 4.1 General boot flow