Alternatives to CodeWarrior for debugging LS1043A

[e_strunk]

Has anybody here successfully used other debuggers than CodeWorrior on LS1043A?

[vinothkumars]

Lauterbach Trace32 debugger is OK for debugging. And we will develop our lauterbach script also for ddr calibration value check, uart configuration and flash.

[e_strunk]

I found three providers beside NXP that offer "out of the box" debug solutions for LS1043A / LS1023A:

Lauterbach:

Debugger for Cortex-A/R (ARMv8 32/64-bit) (LA-3743)

+ either PowerDebug Module USB 3.0 (LA-3500) or PowerDebug PRO Ethernet (LA-3505)
ARM:

DESTREAM-ST Debug & Trace Unit (DSTRMST-KT-0197A)

+ Arm Development Studio (DS000-KD-3x001)

Green Hills Software:

Green Hills Probe preconfigured for the NXP Layerscape LS1023A processor (GH-GP3-ARM-AC1-EUR)

+ MULTI Standard Development Suite for C/C++ (G-MC-ARM-IR-INT-PRM)

I had contact with a Segger support engineer and was told, that they can NOT confirm that J-Link supports LS1043A.

None of the above solutions have been tested by me and my team so far, so this answer is completely theoretical!

[pierre_lp]

Hi,

you also have open source alternatives with Open OCD.

Once the open ocd setup, you can connect GDB server to it, and next Eclipe for example.

Here is the configuration file I used to connect to LS1043A RDB.

# Include script to setup CMSIS debug interface
source [find interface/cmsis-dap.cfg]

# Select transport type
transport select jtag

# Target definition
if { [info exists CHIPNAME] } {
 set _CHIPNAME $CHIPNAME
} else {
 set _CHIPNAME ls1043a
}

if { [info exists CPUTAPID] } {
 set _CPUTAPID $CPUTAPID
} else {
 set _CPUTAPID 0x5ba00477
}

adapter_khz 6000
reset_config srst_only

jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
jtag newtap $_CHIPNAME sap -irlen 8 -expected-id 0x06b1001d

#
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu

target create $_CHIPNAME.sap ls1_sap \
 -chain-position $_CHIPNAME.sap

## declare the 4 cores
set _TARGETNAME $_CHIPNAME.cpu
set $_TARGETNAME.cti(0) 0x80420000
set $_TARGETNAME.cti(1) 0x80520000
set $_TARGETNAME.cti(2) 0x80620000
set $_TARGETNAME.cti(3) 0x80720000
set $_TARGETNAME.dbgbase(0) 0x80410000
set $_TARGETNAME.dbgbase(1) 0x80510000
set $_TARGETNAME.dbgbase(2) 0x80610000
set $_TARGETNAME.dbgbase(3) 0x80710000

set _smp_command ""

set _cores 4
for { set _core 0 } { $_core < $_cores } { incr _core 1 } {

cti create cti$_core \
 -dap $_CHIPNAME.dap\
 -ctibase [set $_TARGETNAME.cti($_core)] \
 -ap-num 1

set _command "target create ${_TARGETNAME}$_core aarch64 \
 -dap $_CHIPNAME.dap -coreid $_core \
 -dbgbase [set $_TARGETNAME.dbgbase($_core)]\
 -cti cti$_core"

if { $_core != 0 } {
 # non-boot core examination may fail
 # set _command "$_command -defer-examine"
 set _smp_command "$_smp_command ${_TARGETNAME}$_core"
 } else {
 set _smp_command "target smp ${_TARGETNAME}$_core"
 }

eval $_command
}
eval $_smp_command

proc ls1043a_prepare { } {
 # Bypass Trust Zone Controller to allow reading and writing anywhere
 echo "Bypassing TZC..."
 targets ls1043a.sap
 ls1043a.sap mww 0x151021c 0 1
}
$_CHIPNAME.sap configure -event examine-end ls1043a_prepare

Kind Regards

Pierre

[alexander_yakov]

Please look LS1043A Product page, "Software & Tools" tab:

https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/qoriq-lay...

At this page there are a number of third-party debug tools from several vendors - ARM DSTREAM, Segger J-Link, GreenHills MULTI and etc.

Have a great day,
Alexander,
TIC

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[e_strunk]

Hello Alexander,

thank you for the quick answer!

I just wanted to let you know that Segger does not officially support LS1043A. I had contact with a segger support engineer and was told, that they can NOT confirm that J-Link supports LS1043A.