Trusted Firmware for Cortex-A (TF-A) is an implementation of EL3 secure firmware. TF-A replaces PPA in secure firmware role. Please note the steps listed in this topic can only be performed with LSDK 18.12 and newer releases.                      To migrate to the TF-A boot flow from the previous boot flow (with PPA), you need to compile the TF-A binaries, bl2_<boot_mode>.pbl and fip.bin, and flash these binaries on the specific boot medium on the board. For NOR boot, you need to compile the following TF-A binaries. TF-A binary name Components bl2_nor BL2 binary: Platform initialization binary RCW binary for NOR boot  fip.bin BL31: Secure runtime firmware BL32: Trusted OS, for example, OPTEE (optional) BL33: U-Boot/UEFI image Follow these steps to compile and deploy TF-A  binaries (bl2_nor.pbl and fip.bin) on the NOR flash. Compile PBL binary from RCW source file Compile U-Boot binary [Optional] Compile OPTEE binary  Compile TF-A binaries (bl2_nor.pbl and fip.bin) for NOR boot Program TF-A binaries to the NOR flash Step 1: Compile PBL binary from RCW source file You need to compile the rcw_1600.bin binary to build the bl2_nor.pbl binary. Clone the  rcw repository and compile the PBL binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/rcw $ cd rcw $ git checkout -b <new branch name> <LSDK tag>. For example, $ git checkout -b LSDK-19.03 LSDK-19.03  $ cd ls1043ardb If required, make changes to the rcw files. $ make   The compiled PBL binary for NOR boot on LS1043ARDB, rcw_1600.bin, is available at rcw/ls1043ardb/RR_FQPP_1455/.   See the rcw/ls1043ardb/README file for an explanation of the naming convention for the directories that contain the RCW source and binary files. Step 2: Compile U-Boot binary You need to compile the u-boot.bin binary to build the fip.bin binary. Clone the u-boot repository and compile the U-Boot binary for TF-A. $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot.git $ cd u-boot $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.03 LSDK-19.03  $ export ARCH=arm64 $ export CROSS_COMPILE=aarch64-linux-gnu- $ make distclean $ make ls1043ardb_tfa_defconfig $ make If the make command shows the error "*** Your GCC is older than 6.0 and is not supported", ensure that you are using Ubuntu 18.04 64-bit version for building the LSDK 18.12 U-Boot binary.                                 The compiled U-Boot binary, u-boot.bin, is available at u-boot/. Step 3: [Optional] Compile OPTEE binary  You need to compile the tee.bin binary to build fip.bin with OPTEE. However, OPTEE is optional, you can skip the procedure to compile OPTEE if you want to build the FIP binary without OPTEE. Clone the optee_os repository and build the OPTEE binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/optee_os $ cd optee_os $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.03 LSDK-19.03 $ export ARCH=arm $ export CROSS_COMPILE=aarch64-linux-gnu- $ make CFG_ARM64_core=y PLATFORM=ls-ls1043ardb $ aarch64-linux-gnu-objcopy -v -O binary out/arm-plat-ls/core/tee.elf out/arm-plat-ls/core/tee.bin The compiled OPTEE image, tee.bin, is available at optee_os/out/arm-plat-ls/core/. Step 4: Compile TF-A binaries for NOR boot Clone the atf repository and compile the TF-A binaries, bl2_nor.pbl and fip.bin. $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/atf $ cd atf $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.03 LSDK-19.03 $ export ARCH=arm64 $ export CROSS_COMPILE=aarch64-linux-gnu- Build BL2 binary with OPTEE. $ make PLAT=ls1043ardb bl2 SPD=opteed BOOT_MODE=nor BL32=<path_to_optee_binary>/tee.bin pbl RCW=<path_to_rcw_binary>/rcw_1600.bin The compiled BL2 images, bl2.bin and bl2_nor.pbl are available at atf/build/ls1043ardb/release/. For any update in the BL2 source code or RCW binary, the bl2_nor.pbl binary needs to be recompiled. To compile the BL2 binary without OPTEE: $ make PLAT=ls1043ardb bl2 BOOT_MODE=nor pbl RCW=<path_to_rcw_binary>/rcw_1600.bin                  Build FIP binary with OPTEE and without trusted board boot. $ make PLAT=ls1043ardb fip BL33=<path_to_u-boot_binary>/u-boot.bin SPD=opteed BL32=<path_to_optee_binary>/tee.bin The compiled BL31 and FIP binaries, bl31.bin, fip.bin, are available at atf/build/ls1043ardb/release/. For any update in the BL31, BL32, or BL33 binaries, the fip.bin binary needs to be recompiled. To compile the FIP binary without OPTEE and without trusted board boot: $ make PLAT=ls1043ardb fip BOOT_MODE=nor BL33=<path_to_u-boot_binary>/u-boot.bin To compile the FIP binary with trusted board boot, refer the read me at <atf repository>/plat/nxp/README.TRUSTED_BOOT                               Step 5: Program TF-A binaries to NOR flash Boot LS1043ARDB from NOR flash. Ensure that the switches are set to boot the board from NOR bank 0. For booting from NOR bank 0, switch settings are as follows: SW3[1:8] = 10110011 SW4[1:8] = 00010010 SW5[1:8] = 10100010 Boot from NOR bank 0: => cpld reset For LS1043ARDB, in boot log, you'll see: Board: LS1043ARDB, boot from vBank 0   Set up Ethernet connection When board boots up, U-Boot prints a list of enabled Ethernet interfaces. FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC3 [PRIME], FM1@DTSEC4, FM1@DTSEC5 Set server IP address to the IP address of the host machine on which you have configured the TFTP server.  => setenv serverip <ipaddress1> Set ethact and ethprime as the Ethernet interface connected to the TFTP server. See LS1043ARDB Ethernet and FMC port mapping for the mapping of Ethernet port names appearing on the chassis front panel with the port names in U-Boot and Linux.                                                   => setenv ethprime <name of interface connected to TFTP server> For example: => setenv ethprime FM1@DTSEC4 => setenv ethact <name of interface connected to TFTP server> For example: => setenv ethact FM1@DTSEC4 Set IP address of the board. You can set a static IP address or, if the board can connect to a dhcp server, you can use the dhcp command.  Static IP address assignment: => setenv ipaddr <ipaddress2> => setenv netmask <subnet mask> Dynamic IP address assignment: => dhcp Save the settings. => saveenv Check the connection between the board and the TFTP server. => ping $serverip Using FM1@DTSEC4 device host 192.168.1.1 is alive   Load TF-A binaries from the TFTP server For details about the flash image layout for TF-A binaries, refer LSDK memory layout for TF-A boot flow.                               Flash bl2_nor.pbl in NOR bank 4. => tftp 82000000 bl2_nor.pbl => erase 64000000 +$filesize;cp.b 82000000 64000000 $filesize Flash fip.bin in NOR bank 4. => tftp 82000000 fip.bin => erase 64100000 +$filesize;cp.b 82000000 64100000 $filesize Boot from NOR bank 4: => cpld reset altbank LS1043ARDB will boot with TF-A. In the boot log, you will see: NOTICE: 2 GB DDR4, 32-bit, CL=11, ECC off NOTICE: BL2: v1.5(release):LSDK-19.03 NOTICE: BL2: Built : 14:43:06, Jun 12 2019 NOTICE: BL31: v1.5(release):LSDK-19.03 NOTICE: BL31: Built : 14:44:16, Jun 12 2019 NOTICE: Welcome to LS1043 BL31 Phase U-Boot 2018.09 (May 23 2019 - 14:35:16 +0530) SoC: LS1043AE Rev1.1 (0x87920011) Clock Configuration: CPU0(A53):1600 MHz CPU1(A53):1600 MHz CPU2(A53):1600 MHz CPU3(A53):1600 MHz Bus: 400 MHz DDR: 1600 MT/s FMAN: 500 MHz Reset Configuration Word (RCW): 00000000: 08100010 0a000000 00000000 00000000 00000010: 14550002 80004012 e0025000 c1002000 00000020: 00000000 00000000 00000000 00038800 00000030: 00000000 00001101 00000096 00000001 Model: LS1043A RDB Board Board: LS1043ARDB, boot from vBank 4 .......

Follow these steps to update the composite firmware image in QSPI NOR flash. cpld reset boots the board from QSPI NOR flash0 and cpld reset altbank boots the board from QSPI NOR flash1. sf probe 0:1 means that the alternate bank will be written to. So, if the board boots from QSPI NOR flash0 and sf probe 0:1 is entered at the U-Boot prompt, the commands that follow will program QSPI NOR flash1. Obtaining composite firmware image  LSDK includes pre-built firmware images for QSPI NOR flash. The LSDK composite firmware includes RCW+PBI, U-Boot/UEFI, PPA, boot loader environment variables, DPAA1 FMan ucode, QE/uQE firmware, Ethernet PHY firmware, device tree, and lsdk_linux_<arch>.itb images. Refer Flash layout for new boot flow with TF-A for the complete flash memory layout of the images.  On a Linux host machine, download composite firmware image for QSPI boot from nxp.com.    $ wget http://www.nxp.com/lgfiles/sdk/lsdk<LSDK version>/firmware_<RDB_name>_uboot_qspiboot.img    For example:  $ wget http://www.nxp.com/lgfiles/sdk/lsdk1812/firmware_ls1046ardb_uboot_qspiboot.img  Flashing composite firmware images to QSPI NOR flash Composite firmware image can be loaded to LS1046ARDB from a TFTP server or from a mass storage device (SD, USB, or SATA). Option 1: Load image from the TFTP server Boot LS1046RDB from QSPI NOR flash. Ensure that the switches are set to boot the board from QSPI NOR flash. For booting from QSPI flash, SW5[1:8] = 00100010 Boot from QSPI NOR flash0: => cpld reset In boot log, you’ll see: Board: LS1046ARDB, boot from QSPI vBank 0 Set up Ethernet connection When board boots up, U-Boot prints a list of enabled Ethernet interfaces. FM1@DTSEC3 [PRIME], FM1@DTSEC4, FM1@DTSEC5, FM1@DTSEC6, FM1@TGEC1, FM1@TGEC2 Set server IP to the IP of the host machine on which you have configured the TFTP server.  => setenv serverip <ipaddress1> Set ethact and ethprime as the Ethernet interface connected to the TFTP server. Refer LS1046ARDB Ethernet port mapping for the mapping of Ethernet port names appearing on the chassis front panel with the port names in U-Boot and Linux. => setenv ethprime <name of interface connected to TFTP server> For example: => setenv ethprime FM1@DTSEC4 => setenv ethact <name of interface connected to TFTP server> For example: => setenv ethact FM1@DTSEC4 Set IP address of the board. You can set a static IP address or, if the board can connect to a dhcp server, you can use the dhcp command. Static IP address assignment: => setenv ipaddr <ipaddress2> => setenv netmask <subnet mask> Dynamic IP address assignment: => dhcp Save the settings. => saveenv Check the connection between the board and the TFTP server. => ping $serverip Using FM1@DTSEC4 device host 192.168.1.1 is alive   Load composite firmware image from the TFTP server Program QSPI NOR flash1: => sf probe 0:1 Flash composite firmware image: => tftp a0000000 firmware_ls1046ardb_uboot_qspiboot.img => print filesize filesize=2351db0 Program composite firmware image to QSPI NOR flash: => sf erase 0x0 +$filesize && sf write 0xa0000000 0x0 $filesize  Address 0x0 is the location of the composite firmware image in QSPI NOR flash.  Refer Flash layout for new boot flow with TF-A for the complete flash memory layout. Boot from QSPI NOR flash1: => cpld reset altbank In boot log, you’ll see: Board: LS1046ARDB, boot from QSPI vBank 4 Ensure that SD card, USB flash drive, or SCSI hard disk installed with LSDK Ubuntu distribution is plugged into the board to boot the board to Ubuntu. If U-Boot does not find LSDK on a mass storage device, it will boot TinyDistro from lsdk_linux_arm64_ tiny.itb stored in QSPI NOR flash. Option 2: Load image from partition on mass storage device (SD, USB, or SATA) Boot LS1046RDB from QSPI NOR flash. Ensure that the switches are set to boot the board from QSPI NOR flash. For booting from QSPI flash, SW5[1:8] = 00100010 Boot from QSPI NOR flash0: => cpld reset In boot log, you’ll see: Board: LS1046ARDB, boot from QSPI vBank 0 Select mass storage device to use. => mmc rescan => mmc info Or => usb start => usb info Or => scsi scan => scsi info Optional – List files on storage device => ls mmc <device:partition> For example: => ls mmc 0:2 Or => ls usb <device:partition> For example: => ls usb 0:1 Or => ls scsi <device:partition> For example: => ls scsi 0:2 Program QSPI NOR flash1: => sf probe 0:1 Load composite firmware image from the storage device => load mmc 0:2 a0000000 <image name> => print filesize For example: => load mmc 0:2 a0000000 firmware_ls1046ardb_uboot_qspiboot.img => print filesize filesize=2351db0 Or => load usb 0:2 a0000000 <image name> => print filesize Or => load scsi 0:2 a0000000 <image name> => print filesize If the ls command fails to run, check that U-Boot in QSPI NOR flash0 supports the command by typing ls at the U-Boot prompt: => ls ls - lists files in a directory (default) Usage: ls <interface> [<dev[:part]> [directory]] - Lists files in directory [directory] of partition [part] on device type [interface] and instance [dev]. If U-Boot does not support this command, then update the composite firmware image in QSPI NOR flash0. Program image to QSPI NOR flash: => sf erase 0x0 +$filesize && sf write 0xa0000000 0x0 $filesize Address  0x0 is the location of the composite firmware image in QSPI NOR flash.  Refer Flash layout for new boot flow with TF-A for the complete flash memory layout.  Boot from QSPI NOR flash1: => cpld reset altbank In boot log, you’ll see: Board: LS1046ARDB, boot from QSPI vBank 4 Ensure that SD card, USB flash drive, or SCSI hard disk installed with LSDK Ubuntu distribution is plugged into the board to boot the board to Ubuntu. If U-Boot does not find LSDK on a mass storage device, it will boot TinyDistro from lsdk_linux_arm64_ tiny.itb stored in QSPI NOR flash.

SECURE BOOT Secure Boot introduction Build secure boot ATF image Generate secure boot CSF headers for Linux tiny itb image Deploy secure boot images on the target board Blow OTPMK fuse in u-boot and through CodeWarrior CCS Write SRK hash keys to the mirror registers through CCS Secure boot Trouble Shooting  Fuse Provisioning Fuse Provisioning Utility Introduction Input File for Fuse Provisioning Tool Build Fuse Provisioning Firmware Image with flex-builder and Deploy the Firmware Image Build and Deploy Fuse Provisioning Image Manually Validate Fuse Provisioning Secure Debug Program DCVR and DRVR fuses to activate secure debug Unlock JTAG debug port after locking it through CCS commands Unlock JTAG debug port after locking it through CW IDE  

This topic explains steps to configure the “MT25QU02GCBB8E12” flash device for LX2160ARDB. The steps are common for most of the flash devices. If the procedure does not work for a particular flash device, please contact NXP Support.   Prerequisite: CW version 2019.01   In a custom design with LX2160, if you want to use the MT25QU02GCBB8E12 flash device which is not supported by the flash programmer,  you can add support for the new flash device by following these steps: Browse to the directory <CW4NET-Installation-Directory>/CW4NET_v2019.01/CW_ARMv8/Config/flash/ Duplicate file devices/MT25QU01GBBB.xml and rename the duplicated file as devices/MT25QU02GBBB.xml Update devices/MT25QU02GBBB.xml as follows: <device-file>       <device>             <content>                   <device_parameters>                         <device_type>spi</device_type>                         <manufacturerid>0x20</manufacturerid>                   </device_parameters>                  <name>MT25QU02GBBB</name>                   <sectors>                        <sector count="4096" size="0x10000"/>                   </sectors>                   <organizations>                         <organization depth="128M" width="8">                              <id>0xBB22</id>                               <algorithm>                                    <fpinclude href="algorithms/MT25QU02GBBB.xml"/>                               </algorithm>                         </organization>                   </organizations>             </content>       </device> </device-file> Duplicate file algorithms/MT25QU01GBBB.xml and rename the duplicated files as algorithms/MT25QU02GBBB.xml Update algorithms/MT25QU02GBBB.xml as follows: <algorithm-file>       <architectures>             <architecture type="arm" address_size="64">                   <controller type="QSPI">                         <format>bin</format>                         <entry_point>0x100</entry_point>                         <file>QSPI_64b</file>                        <fpinclude href="algorithms/params/MT25QU02GBBB_QSPI_64.xml"/>                         <supported_operations>                               <operation>id</operation>                               <operation>erase_sectors</operation>                               <operation>program</operation>                               <operation>dump</operation>                               <operation>protect_sectors</operation>                               <operation>unprotect_sectors</operation>                         </supported_operations>                   </controller>                  <controller type="FSPI">                        <format>bin</format>                        <entry_point>0x100</entry_point>                        <file>FSPI_64b</file>                        <fpinclude href="algorithms/params/MT25QU02GBBB_QSPI_64.xml"/>                        <supported_operations>                              <operation>id</operation>                              <operation>erase_sectors</operation>                              <operation>program</operation>                             <operation>dump</operation>                              <operation>protect_sectors</operation>                              <operation>unprotect_sectors</operation>                        </supported_operations>                  </controller>               </architecture>       </architectures> </algorithm-file> Duplicate algorithms/params/MT25QU01GBBB_QSPI_64.xml and rename the duplicated file as algorithms/params/MT25QU02GBBB_QSPI_64.xml Update algorithms/params/MT25QU02GBBB_QSPI_64.xml as follows: <params_file>     <parameters_block>         <param name="function" size="0x4"/>         <param name="padding1" size="0x4"/>         <param name="base_addr" size="0x8"/>         <param name="num_items" size="0x4" type="data_size"/>         <param name="result_status" size="0x4" type="result"/>         <param name="items" size="0x8" type="data_inout"/>         <param name="qspi_base_addr" size="0x8"/>         <param name="qspi_controller_offset" size="0x4"/>         <param name="bytes_per_sector" size="0x4" value="0x10000"/>         <param name="bytes_per_page" size="0x4" value="0x100"/>          <param name="number_of_sectors" size="0x4" value="0x1000"/>         <param name="swap_enable" size="0x1"/>         <param name="workaround" size="0x1" value="0"/>         <param name="is_nand" size="0x1" value ="0"/>         <param name="block_protect_mask" size="0x1" value="0x5C"/>         <param name="top_bottom_reg_address" size="0x4" value="0"/>         <param name="top_bottom_mask" size="0x1" value="0x20"/> Update the target initialization file as follows: def Config_Flash_Devices():     fl = flash.create(TA)       # Add FlexSPI device     #fl.add_device({"alias": "xspi", "name": "MT35XU512ABA", "address": 0x0, "ws_address": 0x18000000, "ws_size": 0x1FFFF, "geometry": "8x1", "controller": "FSPI"})     # Add MT25QU02GCBB8E12 flash device      fl.add_device({"alias": "xspi", "name": "MT25QU02GBBB", "address": 0x0, "ws_address": 0x18000000, "ws_size": 0x1FFFF, "geometry": "4x1", "controller": "FSPI"}) Restart CodeWarrior for ARMv8 and start the Flash programmer. Select  MT25QU02GBBB device from flash device list and configure the desired operations.

IEEE Std 1588 standard is for a precision clock synchronization protocol for networked measurement and control, define a Precision Time Protocol (PTP) designed to synchronize real-time clocks in a distributed system. This document introduces IEEE 1588 related basic concept and Precision Time Protocol, hardware assist for 1588 compliant time stamping on QorIQ  LS1021 platform, Linux Kernel PTP framework device driver implementation working with ptpd stack, IEEE 1588 test setup on LS1021ATSN platform and results. IEEE 1588 Introduction and Precision Time Protocol Hardware Assist for 1588 Compliant Time Stamping on QorIQ LS1021 Platform      2.1 Accessing Timer Registers      2.2. Time-Stamping on Ethernet Frame Reception for eTSEC      2.3. Time-Stamping on Ethernet Frame Transmission for eTSEC IEEE 1588 PTP Linux Device Driver and PTPd Application     3.1 IEEE 1588 Linux Software Structure     3.2 IEEE 1588 Linux Device Driver 3.3 PTPd Application Setup IEEE 1588 test on LS1021ATSN Platform    4.1 Build Images with OpenIL    4.2 Setup IEEE 1588 test environment on LS1021ATSN    4.3 Test result

Trusted Firmware for Cortex-A (TF-A) is an implementation of EL3 secure firmware. TF-A replaces PPA in secure firmware role. Please note the steps listed in this topic can only be performed with LSDK 18.12 and newer releases.                                                       To migrate to the TF-A boot flow from the previous boot flow (with PPA), you need to compile the TF-A binaries, bl2_<boot_mode>.pbl and fip.bin, and flash these binaries on the specific boot medium on the board. For SD boot, you need to compile the following TF-A binaries. TF-A binary name Components bl2_sd.pbl BL2 binary: Platform initialization binary RCW binary for SD boot  fip.bin BL31: Secure runtime firmware BL32: Trusted OS, for example, OPTEE (optional) BL33: U-Boot/UEFI image Follow these steps to compile and deploy TF-A  binaries (bl2_sd.pbl and fip.bin) on the SD card. Compile PBL binary from RCW source file Compile U-Boot binary [Optional] Compile OPTEE binary  Compile TF-A binaries (bl2_sd.pbl and fip.bin) for SD boot Program TF-A binaries to the SD card Step 1: Compile PBL binary from RCW source file You need to compile the rcw_1600_sdboot.bin binary to build the bl2_sd.pbl binary. Clone the  rcw repository and compile the PBL binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/rcw $ cd rcw $ git checkout -b <new branch name> <LSDK tag>. For example, $ git checkout -b LSDK-19.03 LSDK-19.03  $ cd ls1043ardb If required, make changes to the rcw files. $ make   The compiled PBL binary for SD boot on LS1043ARDB, rcw_1600_sdboot.bin, is available at rcw/ls1043ardb/RR_FQPP_1455/.   See the rcw/ls1043ardb/README file for an explanation of the naming convention for the directories that contain the RCW source and binary files. Step 2: Compile U-Boot binary You need to compile the u-boot.bin binary to build the fip.bin binary. Clone the u-boot repository and compile the U-Boot binary for TF-A. $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot.git $ cd u-boot $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.03 LSDK-19.03  $ export ARCH=arm64 $ export CROSS_COMPILE=aarch64-linux-gnu- $ make distclean $ make ls1043ardb_tfa_defconfig $ make If the make command shows the error "*** Your GCC is older than 6.0 and is not supported", ensure that you are using Ubuntu 18.04 64-bit version for building the LSDK 18.12 U-Boot binary.                                                       The compiled U-Boot binary, u-boot.bin, is available at u-boot/. Step 3: [Optional] Compile OPTEE binary  You need to compile the tee.bin binary to build fip.bin with OPTEE. However, OPTEE is optional, you can skip the procedure to compile OPTEE if you want to build the FIP binary without OPTEE. Clone the optee_os repository and build the OPTEE binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/optee_os $ cd optee_os $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.03 LSDK-19.03 $ export ARCH=arm $ export CROSS_COMPILE=aarch64-linux-gnu- $ make CFG_ARM64_core=y PLATFORM=ls-ls1043ardb $ aarch64-linux-gnu-objcopy -v -O binary out/arm-plat-ls/core/tee.elf out/arm-plat-ls/core/tee.bin The compiled OPTEE image, tee.bin, is available at optee_os/out/arm-plat-ls/core/. Step 4: Compile TF-A binaries for SD boot Clone the atf repository and compile the TF-A binaries, bl2_sd.pbl and fip.bin. $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/atf $ cd atf $  git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.03 LSDK-19.03 $ export ARCH=arm64 $ export CROSS_COMPILE=aarch64-linux-gnu- Build BL2 binary with OPTEE. $ make PLAT=ls1043ardb bl2 SPD=opteed BOOT_MODE=sd BL32=<path_to_optee_binary>/tee.bin pbl RCW=<path_to_rcw_binary>/rcw_1600_sdboot.bin The compiled BL2 images, bl2.bin and bl2_sd.pbl are available at atf/build/ls1043ardb/release/. For any update in the BL2 source code or RCW binary, the bl2_sd.pbl binary needs to be recompiled. To compile the BL2 binary without OPTEE: $ make PLAT=ls1043ardb bl2 BOOT_MODE=sd pbl RCW=<path_to_rcw_binary>/rcw_1600_sdboot.bin                  Build FIP binary with OPTEE and without trusted board boot. $ make PLAT=ls1043ardb fip BL33=<path_to_u-boot_binary>/u-boot.bin SPD=opteed BL32=<path_to_optee_binary>/tee.bin The compiled BL31 and FIP binaries, bl31.bin, fip.bin, are available at atf/build/ls1043ardb/release/. For any update in the BL31, BL32, or BL33 binaries, the fip.bin binary needs to be recompiled. To compile the FIP binary without OPTEE and without trusted board boot: $ make PLAT=ls1043ardb fip BOOT_MODE=sd BL33=<path_to_u-boot_binary>/u-boot.bin To compile the FIP binary with trusted board boot, refer the read me at <atf repository>/plat/nxp/README.TRUSTED_BOOT                               Step 5: Program TF-A binaries to SD card Boot LS1043ARDB from NOR flash. Ensure that the switches are set to boot the board from NOR bank 0. For booting from NOR bank 0, switch settings are as follows: SW3[1:8] = 10110011 SW4[1:8] = 00010010 SW5[1:8] = 10100010 Boot from NOR bank 0: => cpld reset For LS1043ARDB, in boot log, you'll see: Board: LS1043ARDB, boot from vBank 0   Set up Ethernet connection When board boots up, U-Boot prints a list of enabled Ethernet interfaces. FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC3 [PRIME], FM1@DTSEC4, FM1@DTSEC5 Set server IP address to the IP address of the host machine on which you have configured the TFTP server.  => setenv serverip <ipaddress1> Set ethact and ethprime as the Ethernet interface connected to the TFTP server. See LS1043ARDB Ethernet and FMC port mapping for the mapping of Ethernet port names appearing on the chassis front panel with the port names in U-Boot and Linux.                                                   => setenv ethprime <name of interface connected to TFTP server> For example: => setenv ethprime FM1@DTSEC4 => setenv ethact <name of interface connected to TFTP server> For example: => setenv ethact FM1@DTSEC4 Set IP address of the board. You can set a static IP address or, if the board can connect to a dhcp server, you can use the dhcp command.  Static IP address assignment: => setenv ipaddr <ipaddress2> => setenv netmask <subnet mask> Dynamic IP address assignment: => dhcp Save the settings. => saveenv Check the connection between the board and the TFTP server. => ping $serverip Using FM1@DTSEC4 device host 192.168.1.1 is alive   Load TF-A binaries from the TFTP server For details about the flash image layout for TF-A binaries, refer LSDK memory layout for TF-A boot flow.                               Flash bl2_sd.pbl: => tftp 82000000 bl2_sd.pbl => mmc write 82000000 8 <blk_cnt> Here, blk_cnt refers to number of blocks in SD card that need to be written as per the file size. For example, when you load bl2_sd.pbl from the TFTP server, if the bytes transferred is 82809 (14379 hex), then blk_cnt is calculated as "82809/512 = 161 (A1 hex)" + "few sectors for rounding up so that last block is not missed". So, if you round up by 10 (A hex) sectors, for this example, mmc write command will be: => mmc write 82000000 8 AB Flash fip.bin: => tftp 82000000 fip.bin => mmc write 82000000 800 <blk_cnt> Here, blk_cnt refers to number of blocks in SD card that need to be written as per the file size. For example, when you load fip.bin from the TFTP server, if the bytes transferred is 1077157 (106fa5 hex), then blk_cnt is calculated as "1077157/512 = 2103 (837 hex)" + "few sectors for rounding up so that last block is not missed". So, if you round up by 10 (A hex) sectors, for this example, mmc write command will be: => mmc write 82000000 800 841 Boot from SD card: => cpld reset sd LS1043ARDB will boot with TF-A. In the boot log, you will see: NOTICE: Fixed DDR on board NOTICE: 2 GB DDR4, 32-bit, CL=11, ECC off NOTICE: BL2: v1.5(release):LSDK-19.03 NOTICE: BL2: Built : 14:59:48, May 28 2019 NOTICE: BL31: v1.5(release):LSDK-19.03 NOTICE: BL31: Built : 15:07:21, May 28 2019 NOTICE: Welcome to LS1043 BL31 Phase U-Boot 2018.09 (May 23 2019 - 14:35:16 +0530) SoC: LS1043AE Rev1.1 (0x87920011) Clock Configuration: CPU0(A53):1600 MHz CPU1(A53):1600 MHz CPU2(A53):1600 MHz CPU3(A53):1600 MHz Bus: 400 MHz DDR: 1600 MT/s FMAN: 500 MHz Reset Configuration Word (RCW): 00000000: 08100010 0a000000 00000000 00000000 00000010: 14550002 80004012 60040000 c1002000 00000020: 00000000 00000000 00000000 00038800 00000030: 00000000 00001100 00000096 00000001 Model: LS1043A RDB Board Board: LS1043ARDB, boot from SD

PCI-Express introduction PCIe Device Type And Topology PCIe system architecture          2.1 Transaction Layer          2.2 Data link layer          2.3 Physical Layer Interrupts Mechanism PCIe enumeration and resource assignment

Follow these steps to update the Linux kernel image and device tree on the SD card.  Compiling Linux kernel images and device tree On Linux host, clone the repository with Linux kernel image and device tree: $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/linux $ cd linux $ git checkout -b <new branch> <start point> For example, $ git checkout -b LSDK-19.06-V4.14 LSDK-19.06-V4.14 where LSDK-19.06-V4.14 refers to a tag in the format LSDK-<LSDK version>-V<kernel version> $ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- defconfig lsdk.config If you want to make changes to the device tree, open and edit arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts $ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- The binary kernel image Image and compressed kernel image Image.gz are in arch/arm64/boot/. The device tree blob fsl-ls1043a-rdb.dtb is in arch/arm64/boot/dts/freescale/. Copying the compiled kernel images and device tree to the SD card Plug the SD card into the Linux host machine. Mount the SD card partition that contains Linux kernel images and device tree. sudo mkdir <mount_location> sudo mount /dev/sdX <mount_location> Use the command cat /proc/partitions to see a list of devices and their sizes to make sure that the correct device names have been chosen. The SDHC storage drive in the Linux PC is detected as /dev/ sdX, where X is a letter such as a, b, c. Make sure to choose the correct device name, because data on this device will be replaced. If your Linux host machine supports read/write SDHC card directly without an extra SDHC card reader device, the device name of SDHC card is typically mmcblk0. Replace Image, Image.gz, and fsl-ls1043a-rdb.dtb on the SD card with the new files compiled in the steps above. sudo cp /linux/arch/arm64/boot/Image /linux/arch/arm64/boot/Image.gz /linux/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dtb <mount_location> sudo umount /dev/sdX Plug the SD card into LS1043ARDB and boot the board to Ubuntu using the SD card.  If U-Boot does not find LSDK on the SD card, it will boot TinyDistro from lsdk_linux_arm64_tiny.itb stored on the SD card. You can confirm that Linux kernel and device tree is updated on the SD card by running this command and checking the timestamp. root@localhost:~# uname -a Linux localhost 4.14.104 #2 SMP PREEMPT Wed Aug 21 17:14:01 IST 2019 aarch64 aarch64 aarch64 GNU/Linux

This file shows up LS1024A GMAC2 debug, no software support in barebox only workable in kernel. and If using RTL Phy need to add TX_CLK and RX_CLK delay.

Getting RCW image: Getting UEFI image:                              Getting PPA image: Getting Linux kernel and DTB, and Root FS images: - Download Image , fsl-ls1043a-uefi-rdb.dtb and fsl-image-core-ls1043ardb.ext2.gz . - Copy Image and fsl-image-core-ls1043ardb.ext2.gz to the TFTP server directory. Getting GRUB2 image for AARCH64 and sample GRUB configuration: - Download grub image from this location. - Download sample grub configuration from here . Placing GRUB image on FAT formatted SD card: Install FAT32 file system on SD card - Use the DISKPART utililty on windows command prompt to format a SD card with FAT32 file system. Use the following snapshot for reference - Copy grubaa64.efi and ls1043a-grub.cfg to the SD card. Booting to UEFI prompt on LS1043a RDB Board: Boot to u-boot prompt from NOR flash bank 0 on LS1043a RDB.  Setup serial port connection on host machine, to capture logs from the target LS1043a RDB board.. Reset the board to boot u-boot on bank 0, assuming that there is a valid u-boot image flashed on the primary bank 0. Copy Images to NOR flash alternate bank using u-boot commands sete uefi 'tftp 80000000 LS1043ARDB_EFI.fd; erase 0x64400000 0x644FFFFF ; cp.b 80000000 0x64400000 $filesize' sete rcw 'tftp 80000000 rcw_uefi_1500.bin; erase 0x64000000 0x640FFFFF ; cp.b 80000000 0x64000000 $filesize' sete ppa 'tftp 80000000 ppa.itb; erase 0x64500000 0x645FFFFF ; cp.b 80000000 0x64500000 $filesize' sete dtb 'tftp 80000000 fsl-ls1043a-uefi-rdb.dtb; erase 0x65B00000 0x65BFFFFF; cp.b 80000000 65B00000 $filesize' run uefi run ppa run rcw run dtb Note: The host machine is assumed to be having tftp server running, with the relevant files in place. The rcw, uefi, dtb and ppa images can also be found at compass link shared above. Note: Make sure SD card is inserted into the SD card slot on the board. Reset RDB to boot from NOR flash bank 4 => cpld reset altbank You should get UEFI boot prompt, as shown in the image below. Enter 2 to load Shell. On the Shell prompt run the following commands Shell> FS0:   Shell> ls You should see a list of the grub executable and configurations files present on SD card. Booting Linux via PXE on LS1043a RDB: Note: atftpd or tftpd-hpa, is required as tftp server for PXE boot to work. tftpd is not supported.  Load grub by entering the name of the grub executable. Shell> grubaa64.efi On the grub prompt, setup the server and client IPs for TFTP transfer. grub> set net_default_server=<server_ip> grub> net_add_addr eno0 efinet0 <client_ip> Load the grub configuration. grub> configfile (hd3,msdos1)/ls1043a-grub.cfg Grub menu is listed. Choose the entry for liinux boot. See the snapshot below for reference. Linux boot should start in around 7-8 minutes. Data transfer speed is around 100 KB/s.

This how-to topic is applicable for only LSDK 18.09 and older releases. Follow these steps to update the PBL/RCW binary in QSPI NOR flash.  cpld reset boots the board from QSPI NOR flash0 and cpld reset altbank boots the board from QSPI NOR flash1. sf probe 0:1 means that the alternate bank will be written to. So, if the board boots from QSPI NOR flash0 and sf probe 0:1 is entered at the U-Boot prompt, the commands that follow will program QSPI NOR flash1.   Compiling PBL binary from RCW source file (optional) If user already has a PBL binary this step can be skipped.   Clone the rcw  repository and compile the PBL binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/rcw $ cd rcw $ git checkout -b <new branch name> <LSDK tag>. For example, $ git checkout -b LSDK-18.09 LSDK-18.09  $ cd ls1046ardb If required, make changes to the rcw files. $ make The default PBL binary for LS1046ARDB is RR_FFSSPPPH_1133_5559/rcw_1800_qspiboot.bin.swapped By default the QSPI controller on LS1046A reads/writes in 64-bit big endian (BE) mode. This makes it necessary to use a byte swapped PBL binary image, e.g., rcw_1800_qspiboot.bin.swapped. The last PBI command in rcw_1800_qspiboot.bin.swapped is a write to the QPSI_MCR register that changes the endianness of the QSPI controller to 64-bit little endian (LE). With this change, subsequent accesses will be made in little endian format. See the rcw/ls1046ardb/README file for an explanation of the naming convention for the directories that contain the RCW source and binary files. Flashing PBL binary to QSPI NOR flash PBL image can be loaded to LS1046ARDB from a TFTP server or from a mass storage device (SD, USB, or SATA). Option 1: Load image from the TFTP server Boot LS1046ARDB from QSPI NOR flash. Ensure that the switches are set to boot the board from QSPI. For booting from QSPI, SW5[1:8] = 00100010 Boot from QSPI NOR flash0: => cpld reset In boot log, you’ll see: Board: LS1046ARDB, boot from QSPI vBank 0 Set up Ethernet connection When the board boots up, U-Boot prints a list of enabled Ethernet interfaces. FM1@DTSEC3 [PRIME], FM1@DTSEC4, FM1@DTSEC5, FM1@DTSEC6, FM1@TGEC1, FM1@TGEC2 Set server IP to the IP of the host machine on which you have configured the TFTP server.  => setenv serverip <ipaddress1> Set ethact and ethprime as the ethernet interface connected to the TFTP server. Refer LS1046ARDB Ethernet port mapping for the mapping of Ethernet port names appearing on the chassis front panel with the port names in U-Boot and Linux. => setenv ethprime <name of interface connected to TFTP server> For example: => setenv ethprime FM1@DTSEC4 => setenv ethact <name of interface connected to TFTP server> For example: => setenv ethact FM1@DTSEC4 Set IP address of the board. You can set a static IP address or, if the board can connect to a dhcp server, you can use the dhcp command. Static IP address assignment: => setenv ipaddr <ipaddress2> => setenv netmask <subnet mask> Dynamic IP address assignment: => dhcp Save the settings. => saveenv Check the connection between the board and the TFTP server. => ping $serverip Using FM1@DTSEC4 device host 192.168.1.1 is alive Load PBL binary from the TFTP server Program QSPI NOR flash1: => sf probe 0:1 TFTP PBL binary from the server to the DDR and write image to QSPI NOR flash1: => tftp 0xa0000000 <pbl binary> => print filesize filesize=128 => sf erase 0x0 +$filesize && sf write 0xa0000000 0x0 $filesize  Address 0x0 is the location of PBL in the QSPI NOR flash.  Refer Flash layout for boot flow with PPA – LSDK 18.09 and older releases for the complete flash memory layout. Boot from QSPI NOR flash1: => cpld reset altbank In boot log, you’ll see: Board: LS1046ARDB, boot from QSPI vBank 4 Ensure that SD card, USB flash drive, or SCSI hard disk installed with LSDK Ubuntu distribution is plugged into the board to boot the board to Ubuntu. If U-Boot does not find LSDK on a mass storage device, it will boot TinyDistro from lsdk_linux_arm64_ tiny.itb stored in the QSPI NOR flash. Option 2: Load image from partition on mass storage device (SD, USB, or SATA) Boot LS1046ARDB from QSPI NOR flash. Ensure that the switches are set to boot the board from QSPI. For booting from the QSPI flash, SW5[1:8] = 00100010 Boot from flash0: => cpld reset In boot log, you’ll see: Board: LS1046ARDB, boot from QSPI vBank 0 Select mass storage device to use. => mmc rescan => mmc info Or => usb start => usb info Or => scsi scan => scsi info Optional – List files on the storage device. => ls mmc <device:partition> For example: => ls mmc 0:3 System Volume Information/ 168 rcw_1800_qspiboot.bin.swapped 1 file(s), 1 dir(s) Or => ls usb <device:partition> For example: => ls usb 0:1 Or => ls scsi <device:partition> For example: => ls scsi 0:2 If the ls command fails to run, check that U-Boot in QSPI NOR flash0 supports the command by typing ls at the U-Boot prompt: => ls ls - lists files in a directory (default) Usage: ls <interface> [<dev[:part]> [directory]] - Lists files in directory [directory] of partition [part] on device type [interface] and instance [dev]. If U-Boot does not support this command, then update the composite firmware image in QSPI NOR flash0. For steps to update composite firmware image in QSPI NOR flash, refer LS1046ARDB - How to update composite firmware image in QSPI NOR flash. Program QSPI NOR flash1: => sf probe 0:1 Load PBL image from the storage device. => load mmc <device:partition> a0000000 <image name> => print filesize For example: => load mmc 0:3 a0000000 rcw_1800_qspiboot.bin.swapped 168 bytes read in 13 ms (11.7 KiB/s) => print filesize filesize=a8 Or => load usb <device:partition> a0000000 <image name> => print filesize Or => load scsi <device:partition> a0000000 <image name> => print filesize Program image to QSPI NOR flash: => sf erase 0x0 +$filesize && sf write 0xa0000000 0x0 $filesize Address 0x0 is the location of PBL binary in QSPI NOR flash.  Refer Flash layout for boot flow with PPA – LSDK 18.09 and older releases for the complete flash memory layout. Boot from QSPI NOR flash1: => cpld reset altbank In boot log, you’ll see: Board: LS1046ARDB, boot from QSPI vBank 4 Ensure that SD card, USB flash drive, or SCSI hard disk installed with LSDK Ubuntu distribution is plugged into the board to boot the board to Ubuntu. If U-Boot does not find LSDK on a mass storage device, it will boot TinyDistro from lsdk_linux_arm64_ tiny.itb stored in QSPI NOR flash.

In the U-Boot log, the names of the Ethernet interfaces are printed in the format <name>@<interface type>, for example, DPMAC3@xgmii. DPMAC is a DPAA2 object that identifies the physical interface.    Interface name is not fixed in LX2160ARDB, depending upon which interface is active, name will be assigned  in TinyDistro as well as in Ubuntu distribution. Interface names can be checked using ls-listni command. root@TinyDistro:~# ls-listni dprc.1/dpni.1 (interface: eth0, end point: dpmac.2) dprc.1/dpni.0 (interface: eth1, end point: dpmac.17)   For details regarding creation of a DPAA2 network interface (DPNI) in Linux, see "LSDK Quick Start Guide for LX2160ARDB -> Bringing up DPAA2 network interfaces" in Layerscape Software Development Kit User Guide.   The table below shows the mapping of Ethernet port names appearing on the chassis front panel with the port names in U-Boot and Linux for LX2160ARDB.    Port name on chassis Port name in U-Boot Port name in Linux (tinyDistro) Port name in Linux (Ubuntu userland) Description 40G MAC2 DPMAC2@xlaui4 Interface name will be ethn, for example eth0, eth1. Eth0: If PCIe is connected, else it is any connected DPAA2 interface. PCIe: enp1s0   DPAA: ethx 40G MAC2 QSFP+ port 10G MAC3 DPMAC3@xgmii 10G MAC3 USXGMII port 10G MAC4 DPMAC4@xgmii 10G MAC4 USXGMII port 25G MAC5 DPMAC5@25g-aui 25G MAC5 SFP port 25G MAC6 DPMAC6@25g-aui 25G MAC6 SFP port 1G MAC17 DPMAC17@rgmii-id 1G MAC17 RGMII port 1G MAC18 DPMAC18@rgmii-id 1G MAC18 RGMII port  

Follow these steps to update the Linux kernel image and device tree on the eMMC card. NOTE: Below steps are valid for both LX2160ARDB Rev 1.0 and Rev 2.0 revisions. Compiling Linux kernel images and device tree   On Linux host, clone the repository with Linux kernel image and device tree: $git clone https://source.codeaurora.org/external/qoriq/qoriq-components/linux $ cd Linux $ git checkout -b <new branch> <start point> For example, $ git checkout -b LSDK-20.04-V5.4 LSDK-20.04-V5.4 where LSDK-20.04-V5.4 refers to a tag in the format LSDK-<LSDK version>- V<kernel version> $ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- defconfig lsdk.config If you want to make changes to the device tree, open and edit arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts  You can make changes in the Linux kernel source code also if required. $ make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- The binary kernel image Image and compressed kernel image Image.gz are in arch/arm64/boot/. The device tree blob fsl-lx2160a-rdb.dtb is in arch/arm64/boot/dts/freescale/. Copying the compiled kernel images and device tree to the eMMC card   Step1: Copy the kernel images and device tree from Linux host machine Ensure the eMMC card available on the reference board. Check DIP switch settings for the desired boot type. Power on the board and let the board boot to LSDK distro prompt. In case LSDK image is not deployed on the storage device on the board, execute the following command under U-Boot prompt to boot the board to TinyDistro. For FlexSPI NOR boot: => run xspi_bootcmd For SD/eMMC boot: => run sd_bootcmd Log in to LSDK distro as root/root or TinyDistro as “root”. Bring up a network interface with Linux host. Dynamic IP address assignment: # udhcpc -i <port name in Tiny/LSDKDistro> Static IP address assignment: # ifconfig <port name in Tiny/LSDKDistro> <IP address> netmask <netmask address> up For example: # ifconfig enp1s0 192.168.2.120 netmask 255.255.255.0 up  Copy the Kernel, Kernel.gz images and device tree blob fsl-lx2160a-rdb.dtb from host machine. # mkdir <destination folder> # scp <user>@<ipaddress>:<file path>/<filename> <destination folder> For example: # mkdir /kernelfiles # scp user1@192.168.2.1:/tftpboot/Image.gz /kernelfiles   Step2: Copy the kernel image and device tree to the eMMC card sudo fdisk -l to list the disks that are accessible on board. Mount the eMMC card partition that contains Linux kernel images and device tree. NOTE: Use the command cat /proc/partitions to see the list of devices, their partitions along with their sizes to make sure that the correct device and partition name have been chosen. The eMMC storage drive in the Linux PC is detected as /dev/sdX, where X is a letter such as a, b, c. Make sure to choose the correct device name, because data on this device will be replaced. If your Linux host machine supports read/write eMMC card directly without an extra eMMC card reader device, the device name of eMMC card is typically mmcblk1. In general, the Linux kernel images and device tree are stored in the second partition of the eMMC device (mmcblk1p2). For detail on storage layout on SD/eMMC/USB/SATA for LSDK images deployment, refer to section "LSDK memory layout and Userland" in Layerscape Software Development Kit User Guide. # sudo mkdir <mount_folder> # sudo mount /dev/sdX <mount_folder>  For example: # sudo mkdir /carddata # sudo mount /dev/mmcblk1p2 /carddata Replace Image, Image.gz, and fsl-lx2160a-rdb.dtb on the eMMC card with the new files copied in <destination folder> in the steps above. # sudo cp <destination folder>/Image <destination folder>/Image.gz <destination folder>/fsl-lx2160a-rdb.dtb <mount_location> For example: # sudo cp /kernelfiles/Image /kernelfiles/Image.gz /kernelfiles/fsl-lx2160a-rdb.dtb /carddata Unmount the card. for example: # sudo umount /dev/mmc1blk1p2 Reboot the board. At U-Boot prompt, run the following command to boot the board to LSDK distro using eMMC card. => run bootcmd_mmc1 If U-Boot does not find LSDK on the eMMC card, it will boot TinyDistro from lsdk_linux_arm64_ tiny.itb stored on the eMMC card.    

Trusted Firmware for Cortex-A (TF-A) is an implementation of EL3 secure firmware. TF-A replaces PPA in secure firmware role. Please note the steps listed in this topic can only be performed with LSDK 18.12 and newer releases.                      To migrate to the TF-A boot flow from the previous boot flow (with PPA), you need to compile the TF-A binaries, bl2_<boot_mode>.pbl and fip.bin, and flash these binaries on the specific boot medium on the board. For NAND boot, you need to compile the following TF-A binaries. TF-A binary name Components bl2_nand BL2 binary: Platform initialization binary RCW binary for NAND boot  fip.bin BL31: Secure runtime firmware BL32: Trusted OS, for example, OPTEE (optional) BL33: U-Boot/UEFI image Follow these steps to compile and deploy TF-A  binaries (bl2_nand.pbl and fip.bin) on the NAND flash. Compile PBL binary from RCW source file Compile U-Boot binary [Optional] Compile OPTEE binary  Compile TF-A binaries (bl2_nand.pbl and fip.bin) for NAND boot Program TF-A binaries to the NAND flash Step 1: Compile PBL binary from RCW source file You need to compile the rcw_1600_nandboot.bin binary to build the bl2_nand.pbl binary. Clone the  rcw repository and compile the PBL binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/rcw $ cd rcw $ git checkout -b <new branch name> <LSDK tag>. For example, $ git checkout -b LSDK-19.03 LSDK-19.03  $ cd ls1043ardb If required, make changes to the rcw files. $ make   The compiled PBL binary for NAND boot on LS1043ARDB, rcw_1600_nandboot.bin, is available at rcw/ls1043ardb/RR_FQPP_1455/.   See the rcw/ls1043ardb/README file for an explanation of the naming convention for the directories that contain the RCW source and binary files. Step 2: Compile U-Boot binary You need to compile the u-boot.bin binary to build the fip.bin binary. Clone the u-boot repository and compile the U-Boot binary for TF-A. $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot.git $ cd u-boot $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.03 LSDK-19.03  $ export ARCH=arm64 $ export CROSS_COMPILE=aarch64-linux-gnu- $ make distclean $ make ls1043ardb_tfa_defconfig $ make If the make command shows the error "*** Your GCC is older than 6.0 and is not supported", ensure that you are using Ubuntu 18.04 64-bit version for building the LSDK 18.12 U-Boot binary.                                                       The compiled U-Boot binary, u-boot.bin, is available at u-boot/. Step 3: [Optional] Compile OPTEE binary  You need to compile the tee.bin binary to build fip.bin with OPTEE. However, OPTEE is optional, you can skip the procedure to compile OPTEE if you want to build the FIP binary without OPTEE. Clone the optee_os repository and build the OPTEE binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/optee_os $ cd optee_os $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.03 LSDK-19.03 $ export ARCH=arm $ export CROSS_COMPILE=aarch64-linux-gnu- $ make CFG_ARM64_core=y PLATFORM=ls-ls1043ardb $ aarch64-linux-gnu-objcopy -v -O binary out/arm-plat-ls/core/tee.elf out/arm-plat-ls/core/tee.bin The compiled OPTEE image, tee.bin, is available at optee_os/out/arm-plat-ls/core/. Step 4: Compile TF-A binaries for NAND boot Clone the atf repository and compile the TF-A binaries, bl2_nand.pbl and fip.bin. $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/atf $ cd atf $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-19.03 LSDK-19.03 $ export ARCH=arm64 $ export CROSS_COMPILE=aarch64-linux-gnu- Build BL2 binary with OPTEE. $ make PLAT=ls1043ardb bl2 SPD=opteed BOOT_MODE=nand BL32=<path_to_optee_binary>/tee.bin pbl RCW=<path_to_rcw_binary>/rcw_1600_nandboot.bin The compiled BL2 images, bl2.bin and bl2_nand.pbl are available at atf/build/ls1043ardb/release/. For any update in the BL2 source code or RCW binary, the bl2_nand.pbl binary needs to be recompiled. To compile the BL2 binary without OPTEE: $ make PLAT=ls1043ardb bl2 BOOT_MODE=nand pbl RCW=<path_to_rcw_binary>/rcw_1600_nandboot.bin                  Build FIP binary with OPTEE and without trusted board boot. $ make PLAT=ls1043ardb fip BL33=<path_to_u-boot_binary>/u-boot.bin SPD=opteed BL32=<path_to_optee_binary>/tee.bin The compiled BL31 and FIP binaries, bl31.bin, fip.bin, are available at atf/build/ls1043ardb/release/. For any update in the BL31, BL32, or BL33 binaries, the fip.bin binary needs to be recompiled. To compile the FIP binary without OPTEE and without trusted board boot: $ make PLAT=ls1043ardb fip BOOT_MODE=nand BL33=<path_to_u-boot_binary>/u-boot.bin To compile the FIP binary with trusted board boot, refer the read me at <atf repository>/plat/nxp/README.TRUSTED_BOOT                               Step 5: Program TF-A binaries to NAND flash Boot LS1043ARDB from NOR flash. Ensure that the switches are set to boot the board from NOR bank 0. For booting from NOR bank 0, switch settings are as follows: SW3[1:8] = 10110011 SW4[1:8] = 00010010 SW5[1:8] = 10100010 Boot from NOR bank 0: => cpld reset For LS1043ARDB, in boot log, you'll see: Board: LS1043ARDB, boot from vBank 0   Set up Ethernet connection When board boots up, U-Boot prints a list of enabled Ethernet interfaces. FM1@DTSEC1, FM1@DTSEC2, FM1@DTSEC3 [PRIME], FM1@DTSEC4, FM1@DTSEC5 Set server IP address to the IP address of the host machine on which you have configured the TFTP server.  => setenv serverip <ipaddress1> Set ethact and ethprime as the Ethernet interface connected to the TFTP server. See LS1043ARDB Ethernet and FMC port mapping for the mapping of Ethernet port names appearing on the chassis front panel with the port names in U-Boot and Linux.                                                   => setenv ethprime <name of interface connected to TFTP server> For example: => setenv ethprime FM1@DTSEC4 => setenv ethact <name of interface connected to TFTP server> For example: => setenv ethact FM1@DTSEC4 Set IP address of the board. You can set a static IP address or, if the board can connect to a dhcp server, you can use the dhcp command.  Static IP address assignment: => setenv ipaddr <ipaddress2> => setenv netmask <subnet mask> Dynamic IP address assignment: => dhcp Save the settings. => saveenv Check the connection between the board and the TFTP server. => ping $serverip Using FM1@DTSEC4 device host 192.168.1.1 is alive   Load TF-A binaries from the TFTP server For details about the flash image layout for TF-A binaries, refer LSDK memory layout for TF-A boot flow.                               Flash bl2_nand.pbl: => tftp 82000000 bl2_nand.pbl => nand erase 0x0 $filesize;nand write 0x82000000 0x0 $filesize; Flash fip.bin: => tftp 82000000 fip.bin => nand erase 0x100000 $filesize;nand write 0x82000000 0x100000 $filesize; Boot from NAND flash: => cpld reset nand LS1043ARDB will boot with TF-A. In the boot log, you will see: Fixed DDR on board NOTICE: 2 GB DDR4, 32-bit, CL=11, ECC off NOTICE: BL2: v1.5(release):LSDK-19.03 NOTICE: BL2: Built : 14:46:39, Jun 13 2019 NOTICE: BL31: v1.5(release):LSDK-19.03 NOTICE: BL31: Built : 14:52:37, Jun 13 2019 NOTICE: Welcome to LS1043 BL31 Phase U-Boot 2018.09 (Jun 13 2019 - 12:27:15 +0530) SoC: LS1043AE Rev1.1 (0x87920011) Clock Configuration: CPU0(A53):1600 MHz CPU1(A53):1600 MHz CPU2(A53):1600 MHz CPU3(A53):1600 MHz Bus: 400 MHz DDR: 1600 MT/s FMAN: 500 MHz Reset Configuration Word (RCW): 00000000: 08100010 0a000000 00000000 00000000 00000010: 14550002 80004012 e0106000 c1002000 00000020: 00000000 00000000 00000000 00038800 00000030: 00000000 00001100 00000096 00000001 Model: LS1043A RDB Board Board: LS1043ARDB, boot from NAND

This document introduces basic concept of Power Management, LS1028 RCW configuration to enable GPIO, Linux Kernel source and device tree modification to support GPIO wakeup, Kernel configuration to enable sleep feature and GPIO wakeup driver, export GPIO pin and enable interrupt, Order system to sleep and trigger GPIO interrupt to wake up the system.

Trusted Firmware for Cortex-A (TF-A) is an implementation of EL3 secure firmware. TF-A replaces PPA in secure firmware role. Note: Please note the steps listed in this topic can only be performed with LSDK 18.12 and newer releases.                                                                 To migrate to the TF-A boot flow from the previous boot flow (with PPA), you need to compile the TF-A binaries, bl2_<boot_mode>.pbl and fip.bin, and flash these binaries on the specific boot medium on the board. For SD/eMMC boot, you need to compile the following TF-A binaries. TF-A binary name Components bl2_sd.pbl/bl2_emmc.pbl BL2 binary: Platform initialization binary RCW binary for SD/emmc boot  fip.bin BL31: Secure runtime firmware BL32: Trusted OS, for example, OPTEE (optional) BL33: U-Boot/UEFI image   Follow these steps to compile and deploy TF-A  binaries (bl2_sd.pbl/bl2_emmc.pbl and fip.bin) on the SD/eMMC card. Compile RCW binary Compile U-Boot binary [Optional] Compile OPTEE binary  Compile TF-A binaries (bl2_sd.pbl/bl2_emmc.pbl and fip.bin) for SD/eMMC boot Program TF-A binaries to the SD/eMMC card Step 1: Compile RCW binary You need to compile the RCW binary to build the bl2_sd.pbl/bl2_emmc.pbl binary. Clone the  rcw repository and compile the RCW binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/rcw $ cd rcw $ git checkout -b <new branch name> <LSDK tag>. For example, $  git checkout -b LSDK-20.04 LSDK-20.04 Compile RCW for Rev 1 or Rev 2 board. For LX2160ARDB Rev1: $ cd lx2160ardb For LX2160ARDB Rev2: $ cd lx2160ardb_rev2 If required, make changes to the rcw files. $ make The compiled RCW binary for SD/eMMC boot on LX2160ARDB for core frequency 2000 MHz, platform frequency 700 MHz and DDR memory data rate 2900 MT/s, with serdes1 = 19 serdes2 = 5 serdes3 = 2, rcw_2000_700_2900_19_5_2.bin is available at: rcw/lx2160ardb/XGGFF_PP_HHHH_RR_19_5_2 (For LX2160ARDB Rev 1) rcw/lx2160ardb_rev2/XGGFF_PP_HHHH_RR_19_5_2 (For LX2160ARDB Rev 2) Note: See the rcw/lx2160ardb/README or rcw/lx2160ardb_rev2/README file for an explanation of the naming convention for the directories that contain the RCW source and binary files. Step 2: Compile U-Boot binary You need to compile the u-boot.bin binary to build the fip.bin binary. Clone the u-boot repository and compile the U-Boot binary for TF-A. $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/u-boot.git $ cd u-boot $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-20.04 LSDK-20.04  $ export ARCH=arm64 $ export CROSS_COMPILE=aarch64-linux-gnu- $ make distclean $ make lx2160ardb_tfa_defconfig $ make Note: If the make command shows the error "*** Your GCC is older than 6.0 and is not supported", ensure that you are using Ubuntu 18.04 64-bit version for building the LSDK 18.12 and above U-Boot binary.             The compiled U-Boot binary, u-boot.bin, is available at u-boot/. Step 3: [Optional] Compile OPTEE binary  You need to compile the tee.bin binary to build fip.bin with OPTEE. However, OPTEE is optional, you can skip the procedure to compile OPTEE if you want to build the FIP binary without OPTEE. Clone the optee_os repository and build the OPTEE binary.  $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/optee_os $ cd optee_os $ git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-20.04 LSDK-20.04 $ export ARCH=arm $ export CROSS_COMPILE=aarch64-linux-gnu- $ make CFG_ARM64_core=y PLATFORM=ls-lx2160ardb $ aarch64-linux-gnu-objcopy -v -O binary out/arm-plat-ls/core/tee.elf out/arm-plat-ls/core/tee.bin The compiled OPTEE image, tee.bin, is available at optee_os/out/arm-plat-ls/core/. Step 4: Compile TF-A binaries for SD/eMMC boot Clone the atf repository and compile the TF-A binaries, bl2_sd.pbl/bl2_emmc.pbl and fip.bin. $ git clone https://source.codeaurora.org/external/qoriq/qoriq-components/atf $ cd atf $  git checkout -b <new branch name> LSDK-<LSDK version>. For example, $ git checkout -b LSDK-20.04 LSDK-20.04 $ export ARCH=arm64 $ export CROSS_COMPILE=aarch64-linux-gnu- Build BL2 binary with OPTEE. For SD boot: $ make PLAT=lx2160ardb bl2 SPD=opteed BOOT_MODE=sd BL32=<path_to_optee_binary>/tee.bin pbl RCW=<path_to_rcw_binary>/rcw_2000_700_2900_19_5_2.bin For eMMC boot: $ make PLAT=lx2160ardb bl2 SPD=opteed BOOT_MODE=emmc BL32=<path_to_optee_binary>/tee.bin pbl RCW=<path_to_rcw_binary>/rcw_2000_700_2900_19_5_2.bin   The compiled BL2 images, bl2.bin and bl2_sd.pbl/bl2_emmc.pbl are available at atf/build/lx2160ardb/release/. For any update in the BL2 source code or RCW binary, the bl2_sd.pbl/bl2_emmc.pbl binary needs to be recompiled.   To compile the BL2 binary without OPTEE: For SD boot: $ make PLAT=lx2160ardb bl2 BOOT_MODE=sd pbl RCW=<path_to_rcw_binary>/rcw_2000_700_2900_19_5_2.bin    For emmc boot: $ make PLAT=lx2160ardb bl2 BOOT_MODE=emmc pbl RCW=<path_to_rcw_binary>/rcw_2000_700_2900_19_5_2.bin  Build FIP binary with OPTEE and without trusted board boot. $ make PLAT=lx2160ardb fip BL33=<path_to_u-boot_binary>/u-boot.bin SPD=opteed BL32=<path_to_optee_binary>/tee.bin The compiled BL31 and FIP binaries, bl31.bin, fip.bin, are available at atf/build/lx2160ardb/release/. For any update in the BL31, BL32, or BL33 binaries, the fip.bin binary needs to be recompiled.   To compile the FIP binary without OPTEE and without trusted board boot: For SD boot: $ make PLAT=lx2160ardb fip BOOT_MODE=sd BL33=<path_to_u-boot_binary>/u-boot.bin   For eMMC boot: $ make PLAT=lx2160ardb fip BOOT_MODE=emmc BL33=<path_to_u-boot_binary>/u-boot.bin To compile the FIP binary with trusted board boot, refer the read me at <atf repository>/plat/nxp/README.TRUSTED_BOO Step 5: Program TF-A binaries to SD/eMMC card Boot LX2160ARDB from FlexSPI. Ensure that the switches are set to boot the board from FlexSPI. For booting from FlexSPI: SW1[1:8] = 1111 100X [X is 0 for FlexSPI NOR flash0 and X is 1 for FlexSPI NOR flash1] SW2[1:8] = 0000 0110 SW3[1:8] = 1111 1100 SW4[1:8] = 1011 1000 Boot from FlexSPI NOR flash0: => qixis_reset For LX2160ARDB Rev 1, in boot log, you'll see: Board: LX2160ACE Rev1.0-RDB, Board version: B, boot from FlexSPI DEV#0 For LX2160ARDB Rev 2, in boot log, you'll see: Board: LX2160ACE Rev2.0-RDB, Board version: B, boot from FlexSPI DEV#0 Set up Ethernet connection When board boots up, U-Boot prints a list of enabled Ethernet interfaces. DPMAC2@xlaui4, DPMAC3@xgmii [PRIME], DPMAC4@xgmii, DPMAC5@25g-aui, DPMAC6@25g-aui, DPMAC17@rgmii-id, DPMAC18@rgmii-id, e1000#0 Set server IP address to the IP address of the host machine on which you have configured the TFTP server.  => setenv serverip <ipaddress1> Set ethact and ethprime as the Ethernet interface connected to the TFTP server. Note: See LX2160ARDB Ethernet port mapping for the mapping of Ethernet port names appearing on the chassis front panel with the port names in U-Boot and Linux.                                => setenv ethprime <name of interface connected to TFTP server> For example: => setenv ethprime DPMAC3@xgmii => setenv ethact <name of interface connected to TFTP server> For example: => setenv ethact DPMAC3@xgmii Set IP address of the board. You can set a static IP address or, if the board can connect to a dhcp server, you can use the dhcp command.  Static IP address assignment: => setenv ipaddr <ipaddress2> => setenv netmask <subnet mask> => setenv gatewayIP <gateway IP> Dynamic IP address assignment: => dhcp Save the settings. => saveenv Check the connection between the board and the TFTP server. => ping $serverip Using DPMAC3@xgmii device host 192.168.1.1 is alive Load TF-A binaries for SD boot from the TFTP server Note: For details about the flash image layout for TF-A binaries, refer LSDK memory layout for TF-A boot flow. Flash bl2_sd.pbl: => tftp 82000000 bl2_sd.pbl => mmc dev 0; mmc write 82000000 8 <blk_cnt> Here, blk_cnt refers to number of blocks in SD card that need to be written as per the file size. For example, when you load bl2_sd.pbl from the TFTP server, if the bytes transferred is 103353 (193b9 hex), then blk_cnt is calculated as "103353/512 = 201 (C9 hex)" + "few sectors for rounding up so that last block is not missed". So, if you round up by 10 (A hex) sectors, for this example, mmc write command will be: => mmc write 82000000 8 D3 Flash fip.bin: => tftp 82000000 fip.bin => mmc dev 0;  mmc write 82000000 800 <blk_cnt> Here, blk_cnt refers to number of blocks in SD card that need to be written as per the file size. For example, when you load fip.bin from the TFTP server, if the bytes transferred is 1178967 (11fd57 hex), then blk_cnt is calculated as "1178967/512 = 2302 (8FE hex)" + "few sectors for rounding up so that last block is not missed". So, if you round up by 10 (A hex) sectors, for this example, mmc write command will be: =>  mmc write 82000000 800 908 Boot from SD card: => qixis_reset sd LX2160ARDB will boot with TF-A. In the boot log, you will see: => NOTICE: BL2: v1.5(release):LSDK-20.04 NOTICE: BL2: Built : 22:01:10, Aug 20 2020 NOTICE: UDIMM 18ADF2G72AZ-3G2E1 NOTICE: DDR4 UDIMM with 2-rank 64-bit bus (x8) NOTICE: 32 GB DDR4, 64-bit, CL=22, ECC on, 256B, CS0+CS1 NOTICE: BL2: Booting BL31 NOTICE: BL31: v1.5(release):LSDK-20.04 NOTICE: BL31: Built : 22:02:07, Aug 20 2020 NOTICE: Welc U-Boot 2019.10 (Aug 14 2020 - 17:43:28 +0530) SoC: LX2160ACE Rev2.0 (0x87360020) Clock Configuration: CPU0(A72):2000 MHz CPU1(A72):2000 MHz CPU2(A72):2000 MHz CPU3(A72):2000 MHz CPU4(A72):2000 MHz CPU5(A72):2000 MHz CPU6(A72):2000 MHz CPU7(A72):2000 MHz CPU8(A72):2000 MHz CPU9(A72):2000 MHz CPU10(A72):2000 MHz CPU11(A72):2000 MHz CPU12(A72):2000 MHz CPU13(A72):2000 MHz CPU14(A72):2000 MHz CPU15(A72):2000 MHz Bus: 700 MHz DDR: 2900 MT/s Reset Configuration Word (RCW): 00000000: 50777738 24500050 00000000 00000000 00000010: 00000000 0c010000 00000000 00000000 00000020: 02e001a0 00002580 00000000 00000096 00000030: 00000000 00000000 00000000 00000000 00000040: 00000000 00000000 00000000 00000000 00000050: 00000000 00000000 00000000 00000000 00000060: 00000000 00000000 00027000 00000000 00000070: 08b30010 00150020 Model: NXP Layerscape LX2160ARDB Board Board: LX2160ACE Rev2.0-RDB, Board version: B, boot from SD Load TF-A binaries for eMMC boot from the TFTP server Note: For details about the flash image layout for TF-A binaries, refer LSDK memory layout for TF-A boot flow. Flash bl2_emmc.pbl: => tftp 82000000 bl2_emmc.pbl => mmc dev 1; mmc write 82000000 8 <blk_cnt> Here, blk_cnt refers to number of blocks in SD card that need to be written as per the file size. For example, when you load bl2_emmc.pbl from the TFTP server, if the bytes transferred is 103353 (193b9 hex), then blk_cnt is calculated as "103353/512 = 201 (C9 hex)" + "few sectors for rounding up so that last block is not missed". So, if you round up by 10 (A hex) sectors, for this example, mmc write command will be: => mmc write 82000000 8 D3 Flash fip.bin: => tftp 82000000 fip.bin => mmc dev 1; mmc write 82000000 800 <blk_cnt> Here, blk_cnt refers to number of blocks in SD card that need to be written as per the file size. For example, when you load fip.bin from the TFTP server, if the bytes transferred is 1178967 (11fd57 hex), then blk_cnt is calculated as "1178967/512 = 2302 (8FE hex)" + "few sectors for rounding up so that last block is not missed". So, if you round up by 10 (A hex) sectors, for this example, mmc write command will be: =>  mmc write 82000000 800 908 Boot from eMMC card: => qixis_reset emmc LX2160ARDB will boot with TF-A. In the boot log, you will see:   => NOTICE: BL2: v1.5(release):LSDK-20.04 NOTICE: BL2: Built : 22:01:10, Aug 20 2020 NOTICE: UDIMM 18ADF2G72AZ-3G2E1 NOTICE: DDR4 UDIMM with 2-rank 64-bit bus (x8) NOTICE: 32 GB DDR4, 64-bit, CL=22, ECC on, 256B, CS0+CS1 NOTICE: BL2: Booting BL31 NOTICE: BL31: v1.5(release):LSDK-20.04 NOTICE: BL31: Built : 22:02:07, Aug 20 2020 NOTICE: Welc U-Boot 2019.10 (Aug 14 2020 - 17:43:28 +0530) SoC: LX2160ACE Rev2.0 (0x87360020) Clock Configuration: CPU0(A72):2000 MHz CPU1(A72):2000 MHz CPU2(A72):2000 MHz CPU3(A72):2000 MHz CPU4(A72):2000 MHz CPU5(A72):2000 MHz CPU6(A72):2000 MHz CPU7(A72):2000 MHz CPU8(A72):2000 MHz CPU9(A72):2000 MHz CPU10(A72):2000 MHz CPU11(A72):2000 MHz CPU12(A72):2000 MHz CPU13(A72):2000 MHz CPU14(A72):2000 MHz CPU15(A72):2000 MHz Bus: 700 MHz DDR: 2900 MT/s Reset Configuration Word (RCW): 00000000: 50777738 24500050 00000000 00000000 00000010: 00000000 0c010000 00000000 00000000 00000020: 02e001a0 00002580 00000000 00000096 00000030: 00000000 00000000 00000000 00000000 00000040: 00000000 00000000 00000000 00000000 00000050: 00000000 00000000 00000000 00000000 00000060: 00000000 00000000 00027000 00000000 00000070: 08b30010 00150020 Model: NXP Layerscape LX2160ARDB Board Board: LX2160ACE Rev2.0-RDB, Board version: B, boot from eMMC  

The CodeWarrior tool – QCVS SerDes tool allows you to configure the SerDes block and provides you a GUI application to validate the SerDes configuration.  QCVS SERDES supports LX2 but except Serdes#1 Lane H, customer can use the guide below for Tx pattern generation. 

Basic Concept of Secure boot on LS1028A Platform Build secure boot ATF image Generate secure boot CSF headers for Linux tiny itb image Deploy secure boot images on the target board Blow OTPMK fuse in u-boot and through CodeWarrior CCS Write SRK hash keys to the mirror registers through CCS Secure boot Trouble Shooting