ECRP Flash value I found in example projects is zero:
__attribute__ ((used, section(".isr_vector")))
void (* const g_pfnVectors[])(void) = {
// Core Level - CM4
&_vStackTop, // The initial stack pointer
ResetISR, // The reset handler
NMI_Handler, // The NMI handler
HardFault_Handler, // The hard fault handler
MemManage_Handler, // The MPU fault handler
BusFault_Handler, // The bus fault handler
UsageFault_Handler, // The usage fault handler
__valid_user_code_checksum, // LPC MCU checksum
0, // ECRP
0, // Reserved
0, // Reserved
From what I understand, zero value allows everything (least restrictive) when CRP_ALLOW_ZERO bit in OTP memory is 0 (factory). It locks everything (most restrictive) when CRP_ALLOW_ZERO bit is set.
Why doesn't NXP use the correct value, indipendently from CRP_ALLOW_ZERO? It should be:
(0x3F << 0) | /* 0 sectors protected */
(0x2 << 10) | /* IAP Sector Erase/Write protection is disabled */
(0x2 << 12) | /* Allow ISP entry via pins */
(0x2 << 14) | /* Allow ISP entry via IAP call */
(0x2 << 16) | /* Enable external access to the chip */
That is 0x0002'A83F.
