bit 0 LPC_CGU->PLL1_STAT change

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

bit 0 LPC_CGU->PLL1_STAT change

1,251 次查看
gustavomuro
Contributor I

Hi

When the processor start, the bit 0 of LPC_CGU->PLL1_STAT change betwen 1 and 0.

This cause the function Chip_Clock_GetRate(CLK_MX_MXCORE) return 0 because Chip_Clock_GetMainPLLHz() return 0.

What time recommend waiting for it to stabilize?

Thanks!

标签 (2)
0 项奖励
回复
1 回复

1,151 次查看
kerryzhou
NXP TechSupport
NXP TechSupport

Hi Gustavo,

   Could you please tell us what the chip you are using now?

   Then we can help you to check it or find a code for your reference .

Waiting for your reply!


Have a great day,
Kerry

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 项奖励
回复