The GPIO of the LPC1125 cannot output low level, why?
main();
int main (void) {
SystemCoreClockUpdate();//LPC1125 Clock Settings. LPC1125时钟设置
LPC_SYSCON->SYSAHBCLKCTRL |= (1UL << 6 | 1UL << 16);
/* enable clock for GPIO */
LPC_IOCON->PIO2_0 = 0xD0;
LPC_IOCON->PIO2_1 = 0xD0;
LPC_IOCON->PIO2_2 = 0xD0;
LPC_GPIO2->DIR = 0x07;
LPC_GPIO2->MASKED_ACCESS[0x07] = 0;
//However, PIO2_0 is always high, and cannot output low level. The program downloads normally.
//但是PIO2_0始终是高电平,无法输出低电平。程序下载正常。
}
SystemCoreClockUpdate();
void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
{
uint32_t oscClk = 0;
/* Determine clock frequency according to clock register values */
switch ((LPC_SYSCON->WDTOSCCTRL >> 5) & 0x0F) {
case 0: oscClk = 0; break;
case 1: oscClk = 600000; break;
case 2: oscClk = 1050000; break;
case 3: oscClk = 1400000; break;
case 4: oscClk = 1750000; break;
case 5: oscClk = 2100000; break;
case 6: oscClk = 2400000; break;
case 7: oscClk = 2700000; break;
case 8: oscClk = 3000000; break;
case 9: oscClk = 3250000; break;
case 10: oscClk = 3500000; break;
case 11: oscClk = 3750000; break;
case 12: oscClk = 4000000; break;
case 13: oscClk = 4200000; break;
case 14: oscClk = 4400000; break;
case 15: oscClk = 4600000; break;
}
oscClk /= ((LPC_SYSCON->WDTOSCCTRL & 0x1F) << 1) + 2;
switch (LPC_SYSCON->MAINCLKSEL & 0x03) {
case 0: /* Internal RC oscillator */
SystemCoreClock = __IRC_OSC_CLK;
break;
case 1: /* Input Clock to System PLL */
switch (LPC_SYSCON->SYSPLLCLKSEL & 0x03) {
case 0: /* Internal RC oscillator */
SystemCoreClock = __IRC_OSC_CLK;
break;
case 1: /* System oscillator */
SystemCoreClock = __SYS_OSC_CLK;
break;
case 2: /* Reserved */
case 3: /* Reserved */
SystemCoreClock = 0;
break;
}
break;
case 2: /* WDT Oscillator */
SystemCoreClock = oscClk;
break;
case 3: /* System PLL Clock Out */
switch (LPC_SYSCON->SYSPLLCLKSEL & 0x03) {
case 0: /* Internal RC oscillator */
if (LPC_SYSCON->SYSPLLCTRL & 0x180) {
SystemCoreClock = __IRC_OSC_CLK;
} else {
SystemCoreClock = __IRC_OSC_CLK * ((LPC_SYSCON->SYSPLLCTRL & 0x01F) + 1);
}
break;
case 1: /* System oscillator */
if (LPC_SYSCON->SYSPLLCTRL & 0x180) {
SystemCoreClock = __SYS_OSC_CLK;
} else {
SystemCoreClock = __SYS_OSC_CLK * ((LPC_SYSCON->SYSPLLCTRL & 0x01F) + 1);
}
break;
case 2: /* Reserved */
case 3: /* Reserved */
SystemCoreClock = 0;
break;
}
break;
}
SystemCoreClock /= LPC_SYSCON->SYSAHBCLKDIV;
}
SYSAHBCLKCTR
SYSAHBCLKCTRL
bit Symbol Value Description
6 GPIO 0 Disable clock for GPIO.
1 Enable *
16 IOCON 0 Disable clock for I/O configuration block.
1 Enable *
LPC_GPIO2->DIR
LPC_GPIO2->MASKED_ACCESS
/*------------- General Purpose Input/Output (GPIO) --------------------------*/
/** @addtogroup LPC112x_GPIO LPC112x General Purpose Input/Output
@{
*/
typedef struct
{
union {
__IO uint32_t MASKED_ACCESS[4096]; /*!< Offset: 0x0000 to 0x3FFC Port data Register for pins PIOn_0 to PIOn_11 (R/W) */
struct {
uint32_t RESERVED0[4095];
__IO uint32_t DATA; /*!< Offset: 0x3FFC Port data Register (R/W) */
};
};
uint32_t RESERVED1[4096];
__IO uint32_t DIR; /*!< Offset: 0x8000 Data direction Register (R/W) */
__IO uint32_t IS; /*!< Offset: 0x8004 Interrupt sense Register (R/W) */
__IO uint32_t IBE; /*!< Offset: 0x8008 Interrupt both edges Register (R/W) */
__IO uint32_t IEV; /*!< Offset: 0x800C Interrupt event Register (R/W) */
__IO uint32_t IE; /*!< Offset: 0x8010 Interrupt mask Register (R/W) */
__I uint32_t RIS; /*!< Offset: 0x8014 Raw interrupt status Register (R/ ) */
__I uint32_t MIS; /*!< Offset: 0x8018 Masked interrupt status Register (R/ ) */
__O uint32_t IC; /*!< Offset: 0x801C Interrupt clear Register (/W) */
} LPC_GPIO_TypeDef;
//However, PIO2_0 is always high, and cannot output low level. The program downloads normally.
//但是PIO2_0始终是高电平,无法输出低电平。程序下载正常。
解決済! 解決策の投稿を見る。
1. SWDIO/PIO1_3, add external 4.7K to 10K pull up resistor. SWD_CLK don't add external circuit.
2. RESET/PIO0_0, should add 4.7K to 10K pull up resistor, and 0.1uf Capacitor to ground.
3. P0_1, should add 4.7K to 10K pull up resistor.
4. Check the schematic diagram and select the correct PIO2_0.
Wei Lang
1. SWDIO/PIO1_3, add external 4.7K to 10K pull up resistor. SWD_CLK don't add external circuit.
2. RESET/PIO0_0, should add 4.7K to 10K pull up resistor, and 0.1uf Capacitor to ground.
3. P0_1, should add 4.7K to 10K pull up resistor.
4. Check the schematic diagram and select the correct PIO2_0.
Wei Lang
Hi,
Just after a brief review, can you use the code and test the pin:
change
LPC_GPIO2->MASKED_ACCESS[0x07] = 0;
to
LPC_GPIO2->MASKED_ACCESS[4095] = 0;
Pls have a try
BR
XiangJun Rong
It cannot solve when I changing to :
LPC_GPIO2->MASKED_ACCESS[4095] = 0;
There may be other problems.