SPWM WITH SCT BLOCK AND DMA
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Hello,
I am trying to generate a Sine PWM signal with fewer ISR, my source code looks like this at the moment:
This code is a modified version from the SCT example, I been able to successfully generate the modulation for the sine wave and after low pass filter I get good enough result BUT the main drawback is that it requires lots of interrupts.
I know that I have to enable the SCT DMAREQ0 to match the event 0 and also have to match it with DMA_ITRIG_INMUX[2].
thanks.
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Hi,
Pls refer to the application note an11538.pdf which I attached.
I suppose that you should follow up the procedures:
1)use the code in AN so that you can output a PWM signal via PWM output pin without interrupt and DMA involved.
2)have the SCT to generate interrupt, in the ISR, update the PWM duty cycle with sine-table as you have done without DMA involved. You can see the variable duty cycle of PWM via scope.
3)disable SCT interrupt, use DMA to update the PWM duty cycle. While you have to enable DMA interrupt after a sine cycle has completed, in the DMA ISR, assign the sine-table address to the DMA source address.
For the SCT module, you can use register access as the AN, for the DMA, you can call the SDK function.
Hope it can help you
BR
XiangJun Rong
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Thanks for replying, would it be possible to update the Duty Cycle of the SCT without any interrupt ? even without the DMA interrupt that you suggested ???
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Hi,
Of course, it is impossible to update duty cycle without interrupt.
I just give you suggestion from simplicity to complexity.
Can you output PWM signal now?
Hope it can help you
BR
XiangJun Rong
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understood, Yes, let me share the script.
At this time the program will have the trigger by hardware set and creating the request for the interruption. I am having an issue were I can only transfer the first item of the buffer instead of the whole thing.
so the program generates a PWM output and only transfers one item from the buffer.
please see attachment.
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This is the code I have developed so far:
I see on debug mode that on register DAMREQ0 and bit DRQ0 is set, the description says if I can see this bit set there's probably some issue with the configuration on the DMA side.
would you be able to help me catch the mistake on the configuration of the DMA side ???
I am complete newbie with DMA.