SGPIO: Interrupt on Data Qualifier pin

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SGPIO: Interrupt on Data Qualifier pin

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zzzmqp
Contributor III

I have SGPIO configured to use SGPIO9 as the data qualifier pin:

Chip_SCU_PinMuxSet(8,1, SCU_MODE_FUNC4 | SCU_PINIO_FAST_DATA);  // P8_1/FUNC4 = SGPIO9‍‍‍

LPC_SGPIO->SGPIO_MUX_CFG[0] =
     (0L << 12) |      // CONCAT_ORDER = X
     (0L << 11) |      // CONCAT_ENABLE = X
     (0L << 9) |      // QUALIFIER_SLICE_MODE = X
     (1L << 7) |      // QUALIFIER_PIN_MODE = 1 (SGPIO9)
     (3L << 5) |      // QUALIFIER_MODE = 3 (qualifier on SGPIO pin)
     (0L << 3) |      // CLK_SOURCE_SLICE_MODE = X
     (0L << 1) |      // CLK_SOURCE_PIN_MODE = 0 (SGPIO8)
     (1L << 0);           // EXT_CLK_ENABLE = 1 (external clock on SGPIO pin)
     LPC_SGPIO->SLICE_MUX_CFG[0] =
     (0L << 8) |      // INV_QUALIFIER = X
     (2L << 6) |      // PARALLEL_MODE = 2 (shift 4 bits per clock)
     (0L << 4) |      // DATA_CAPTURE_MODE = X
     (0L << 3) |      // INV_OUT_CLK = 0 (normal clock)
     (1L << 2) |      // CLKGEN_MODE = 1 (use external clock on SGPIO pin)
     (0L << 1) |      // CLK_CAPTURE_MODE = 0 (use rising clock edge)
     (0L << 0);           // MATCH_MODE = 0 (do not match data)

The signal on this pin marks the length of the frame and the SGPIO part works fine.

However, after the complete frame was shifted in, I use the falling edge of that signal to start processing the frame.

Today I use polling:

data_valid_NOW = (bool) (LPC_SGPIO->GPIO_INREG & (1L << 9));  // Update current DV status

if ( data_valid_PRE && !data_valid_NOW )  // Falling edge detected
{
  // process frame
}‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

data_valid_PRE = data_valid_NOW;

I've seen some cases where the next frame started before the polling detected the falling edge.

For that reason I'm thinking about triggering a pin interrupt (falling edge) to capture the 'frame end' event independently of the main loop.

Per UM10503 (chapter 20.4):

Input:
...
– Inputs can raise interrupt on input level (LOW or HIGH) or transitions (rising, falling
rising or falling). Interrupts can be masked.

But how can I configure that interrupt? It's not a GPIO interrupt, I guess, because the pin is configured as SGPIO FUNC, not GPIO FUNC.

Any ideas / examples how to trigger an edge interrupt on a SGPIO input pin?

Thanks for any input...

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zzzmqp
Contributor III

Across AN11275 and UM10503 I see two things:

1. SGPIO as GPIO:

20.7.4 Pin multiplexing

Each pin can also be controlled for normal GPIO functions (input, output, output enable)
using registers GPIO_INREG, GPIO_OUTREG and GPIO_OEREG.

That's basically what I'm doing for polling (LPC_SGPIO->GPIO_INREG), but I think this will not allow me to trigger 'regular' GPIO Interrupts that way, correct? (What would be the GPIO Port/Pin number etc..?)

2. SGPIO Interrupt

20.6.37 Input bit match interrupt set mask register
Table 312. Input interrupt set mask register (SET_EN_3, address 0x4010 1F64) bit description

Bit Symbol Description
15:0 SET_EN_INPI 1 = Input interrupt set mask of slice n.

I don't need a slice to generate an Interrupt (I use automatic SGPIO DMA transfers to move the data), but instead a SGPIO pin (the data qualifier input) to trigger an edge interrupt.

Is SET_EN_3 still the right way to do this?

I hoped there was example code that shows how to trigger an edge Interrupt on any (already used and configured) SGPIO pin, but I will probably have to experiment...

Thank you.

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zzzmqp
Contributor III

Per UM10503 (Rev. 2.1), Table 317, in 1-bit mode, Slice M (12), bit 31 is the SGPIO9 input bit.

So I setup the Slice M accordingly for falling edge input bit interrupt trigger and enable the input bit interrupt on bit 12:

void SGPIO_IRQSetup(void)
{
  // Configure Slice M: Data bit interrupt (SGPIO9)
  LPC_SGPIO->SGPIO_MUX_CFG[12] =
  (0L << 12) | // CONCAT_ORDER = 0 (self loop)
  (0L << 11) | // CONCAT_ENABLE = 0 (external data pin)
  (0L << 9) | // QUALIFIER_SLICE_MODE = X
  (0L << 7) | // QUALIFIER_PIN_MODE = X
  (0L << 5) | // QUALIFIER_MODE = 0 (enable)
  (0L << 3) | // CLK_SOURCE_SLICE_MODE = X
  (0L << 1) | // CLK_SOURCE_PIN_MODE = 0 (SGPIO8)
  (1L << 0); // EXT_CLK_ENABLE = 1 (external clock on SGPIO pin)
  LPC_SGPIO->SLICE_MUX_CFG[12] =
  (0L << 8) | // INV_QUALIFIER = X
  (0L << 6) | // PARALLEL_MODE = 0 (shift 1 bits per clock)
  (1L << 4) | // DATA_CAPTURE_MODE = 1 (detect falling edge)
  (0L << 3) | // INV_OUT_CLK = 0 (normal clock)
  (1L << 2) | // CLKGEN_MODE = 1 (use external clock on SGPIO pin)
  (0L << 1) | // CLK_CAPTURE_MODE = 0 (use rising clock edge)
  (0L << 0); // MATCH_MODE = 0 (no pattern match)

  LPC_SGPIO->CTRL_ENABLED |= (1L << 12); // Enable Slice M
  
  // Setup SGPIO interrupts
  LPC_SGPIO->CLR_EN_3 = 0xffff; // Disable all SGPIO interrupts
  while(LPC_SGPIO->ENABLE_3 & 0xffff);
  
  LPC_SGPIO->CTR_STATUS_3 = 0xffff; // Clear interrupt status and wait for it to clear
  while(LPC_SGPIO->STATUS_3 & 0xffff);

  LPC_SGPIO->SET_EN_3 |= (1 << 12); // Set input interrupt mask Slice M

  NVIC_EnableIRQ(SGPIO_INT_IRQn);
}‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

This is the SGPIO Interrupt handler:

void SGPIO_IRQHandler(void) //Handles all SGPIO interrupts
{
  if(LPC_SGPIO->STATUS_3 & (1 << 12)) // SGPIO Slice M falling edge on input data bit interrupt
  {
    // Code to handle interrupt here
  }
  LPC_SGPIO->CTR_STATUS_3 = 0xFFFF; //Clear all interrupts
}‍‍‍‍‍‍‍‍

No interrupt is triggered on falling edges of SGPIO9...  

What am I doing wrong?

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi

I will create an example based on MCB4300 board for your reference.

Thank you for the patience.

Have a great day,
Ma Hui
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1,526 次查看
zzzmqp
Contributor III

Great, thank you Ma Hui. I appreciate it!

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi

Thank you for the patience.

Please refer my test code, based on lpcopen_2_19_keil_iar_mcb_4357 software [blinky] project, which located at:

..\lpcopen_2_19_keil_iar_keil_mcb_4357\applications\lpc18xx_43xx\iar\keil_mcb_4357\periph\blinky  folder.

I use P1_0(SGPIO7) pin to generate input bit match interrupt with falling edge.


Wish it helps.

Have a great day,
Ma Hui
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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi

There is an application note AN11275 about how to use SGPIO interrupt at chapter 6.


Wish it helps.

Have a great day,
Ma Hui
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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