Programming Multi-chip LPC845 by I2C of ISP mode

[xiangchangmo]

Hi ALL

I would like to program the 2-chip LPC845 SLAVE by the 1052 HOST, and by the I2C in the ISP mode, because the flash size limit we do not consider the IAP mode, and now we have a problem with how to set the I2C slave address of the LPC845 at the ISP mode, The user manual for the LPC845 is also a simple illustration 'The LPC84x will respond to a host system on I2C addresses 0x18, 0x1C, 0x30, and 0x38'.   

There is no explanation of how to set the I2C slave address in ISP mode, we know that the slave address must be unique when I 2C communication, I also can't see the relevant settings in the FAIM, we can't find any other instructions manual, Can someone help me? thank you!!!!

In addition, I know that someone would recommend controlling the PIO_12 pin of the LPC845 independently when the power is on, allowing only one 845 to enter ISP mode, but we can't because the GPIO resources for the 1052 host are insufficient, and we used 3 groups of I2C to program 5-ship 845

   

best regard

xc.mo

[ZhangJennie]

Hi xc.mo,

With I2C of ISP mode, we can only utilize one-one connection, there is no way to program multi-chip LPC845 by I2C of ISP mode because there is no way to select unique I2C slave address in ISP mode.

To program multi-chip LPC845 by I2C, our suggestion is to develop secondary bootloader.

I just checked we don't have exact secondary bootloader demo for LPC845. I only found AN11780 ( SBL source code needs NDA to be signed) and AN11782 ( SBL source code is open). You can search these two ANs from NXP website.

Have a great day,
Jun Zhang

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