Hi all,
I'm working with a custom board with an LPC4330 (flashless) with a SPIFI flash.
My problem happens when the micro wake up: the wake up signal came from the WAKEUP0 pin, the micro detect it and as soon as it wakes up, I restore the clocks as in chapter 13.1.1.2 Changing the BASE_M4_CLK after waking up from deep-sleep or power-down modes of the Datasheet.
The procedure gave me no problem, the micro doesn't get stuck in any of the operation (previously I had problems during startup due to not long enough wait cycles between some operation) but the very next function call after setting up the clocks results in losing debug connection (PC = 0xDEADBEEF or something similar).
This is the function before going in deep sleep:
/**
* Set IRC as source clock fo all the output clocks & power down
* before going to 'Deep Sleep'/'Power Down'/'Deep Power Down' modes
*/
void SystemSetupClocking_SleepPowerDown(void)
{
int i;
/* Shutdown perpheral clocks with wake up enabled */
Chip_Clock_StartPowerDown();
/* Get state of individual base clocks & store them for restoring.
* Sets up the IRC as base clock source
*/
for (i = 0; i < (sizeof(InitClkStates) / sizeof(InitClkStates[0])); i++)
{
/* Get the Base clock settings */
Chip_Clock_GetBaseClockOpts(InitClkStates[i].clk, &InitClkStates[i].clkin,
&InitClkStates[i].autoblock_enab, &InitClkStates[i].powerdn);
/* Set IRC as clock input for all the base clocks */
Chip_Clock_SetBaseClock(InitClkStates[i].clk, CLKIN_IRC, InitClkStates[i].autoblock_enab,
InitClkStates[i].powerdn); /* wow that's hardcore */
}
/* Set IRC as clock source for SPIFI */
Chip_Clock_SetBaseClock(CLK_BASE_SPIFI, CLKIN_IRC, true, false);
/* Set IRC as source clock for Core */
Chip_Clock_SetBaseClock(CLK_BASE_MX, CLKIN_IRC, true, false);
/* Power down the main PLL */
Chip_Clock_DisableMainPLL();
Chip_Clock_DisablePLL(CGU_USB_PLL);
Chip_Clock_DisableCrystal();
}
And this is the function to restore pll and clocks:
uint16_t i;
PLL_PARAM_T ppll;
Chip_Clock_GetMainPll(&ppll);
/* 1 Enable the crystal oscillator */
Chip_Clock_EnableCrystal();
Chip_Clock_EnableMainPLL();
/* 2 Select the crystal as clock source for BASE_M4_CLK */
ppll.srcin = CLKIN_CRYSTAL;
/* 3 set autoblock bit */
ppll.autoblock = 1; /* */
/* 4a Reconfigure pll: M and N */
Chip_Clock_CalcMainPLLValue(Desired_Freq, &ppll); /* calc of param for pll for desired freq - results in ppll !!!! */
/* 4b: crystal as clock source for PLL1 */
//ppll.srcin = CLKIN_CRYSTAL;
Chip_Clock_SetupMainPLL(&ppll); // yeah set again
Sysinit_delay(1000); /* mine */
/* 5 wait pll lock */
while(!Chip_Clock_MainPLLLocked()) {}
/* 6 set direct = 0 psel = 0*/
ppll.ctrl &= ~(1<<7); /* clears DIRECT */
ppll.psel = 0; /* psel to 0 */
/* 7 select pll1 as base_m4_clk source */
Chip_Clock_SetBaseClock(CLK_BASE_MX, CLKIN_MAINPLL, true, false); /* passing 3rd as true = AUTOBLOCK = true */
/* 8 wait 50 us */
Sysinit_delay(0x4000); /* 4800*/
/* 9 set direct to 1 */
ppll.ctrl |= (1 << 7); /* set DIRECT */
ppll.psel = 0;
Chip_Clock_SetupMainPLL(&ppll); /* Set DIRECT to operate at full frequency */
Sysinit_delay(0x4000); /* 4800*/
while(!Chip_Clock_MainPLLLocked()) {}
Chip_Clock_SetBaseClock(CLK_BASE_SPIFI, CLKIN_IDIVE, true, false);
for (i = 0; i < (sizeof(InitClkStates) / sizeof(InitClkStates[0])); i++)
{
Chip_Clock_SetBaseClock(InitClkStates[i].clk, InitClkStates[i].clkin,
InitClkStates[i].autoblock_enab, InitClkStates[i].powerdn);
//Chip_sysinit_delay(1000); /* mine */
}
Any suggestion?
If I reset the micro, it clearly works fine.