PCB layout for LPC-Link2 development board

[QM]

Hello NXP community, 

I have been a using the lpc-link2 development board for a project that I have been working on for the past 3 years. Recently I have found it difficult to purchase more of this dev board (it is a bit old at this point) but am still keen to continue working with the lpc4370 chip. 

I am planning on mostly replicating the link2 using the lpc4370, and have been referring to the schematic file provided online. However I am wondering if it would also be possible to get access to PCB layout files? Or are these considered IP / trade secret?

I also wonder how other companies distribute PCB files for manufacturing their dev boards, as I believe the same Arduino board designs are manufactured by a range of companies, for example. Or am I mistaken...?

Cheers,

Quinn    

[Eli_H]

You might want to check with Embedded Artists.   The did the design of the board.

https://www.embeddedartists.com/products/lpc-link2/

I have a very simple design for a castellated via module that uses the LPC4370.    The format is Altium Designer.

-Eli

[QM]

Hi Eli,

Thanks for your prompt response. I have emailed embedded artists so hopefully they will be kind enough to share their files. 

Would you be comfortable sharing your design? My main concern is designing for a 100 bga chip, which I have not done before. I wonder about track width/spacing and how many layers I will need. There should be plenty of resources online to help with this too. 

Regards, 

Quinn

[Eli_H · Accepted solution]

See attached files.   This was a design I did about 5 years ago.    (I removed some of the branding/names).      There are the Altium files as well as .pdfs of the schematic, gerbers, PCB notes, assembly drawings, etc.

This was built as a castellated via module.   It was to intended to be a highspeed digitizer for an ultrasonic signal.     It was built/prototyped with some software development.   No known issues but use at your own risk.   I only checked the interfaces that were critical to our experiment.  Should be enough to get you started.

[QM]

Thank you!

Yes I am hoping to get away with 4 layers too, but shouldn't have too much trouble thanks to this example. 

Regards, 

Quinn

[Eli_H]

BTW:  Feel free to reach out via email if you need layout help.      It would be possible to it pinned out on 4 layers, you just might have to eat into your internal reference planes.  6 gives you some breathing room.    I didn't need all of the IO so it this one ways done on 4. The low cost services like JLCPCB can easily handle the required geometries, etc.