Hello Alice,
First, thank you for the fast reply to my technical inquiry! I should have shared a little more context regarding my development tools and environment: I'm fairly far into firmware development on the LPC55S69, using Zephyr's toolchain including `west`, cmake, a GCC cross-compiler and related tools. I do not have MCUExpresso installed, nor have I been looking to go with any graphically enabled development environment.
Your screen shot highlighting dual-core samples gives me some specific demo applications to explore, so again thank you. I have however already searched for some twenty minutes for the SDK you cite, and it's not obvious to me how it is named or whether it is bundled with an IDE.
Does NXP offer the SDK just as a set of sources and headers, a library and collection of compile-able software without development tools?
This type of download would be the most useful for me to review the demos and see whether they answer my question. Though I will be surprised whether these demos go to the actual question of whether there is memory access arbitration at the hardware / silicon level of the LPC55S69. That is really my original question.
I believe there must be some kind of memory access arbitration provided by whichever version of AHB or AHB-Lite is / are implemented in the LPC55S69 bus matrix. But if by chance there is not, then I will carefully study the SDK demos for any software implementations of mutex or semaphores which coordinate dual-core apps and protect from race conditions.
Thank you ahead of time for what help you can offer navigating me to the SDK. Let me know also if there is a better community forum here for the hardware related question I posed. Sorry if I have posted to the wrong community forum!
- Ted