Hello, I am trying to configure I2C to work at 400kHz. I am using a logic analyzer at 8Ms/s to see SCL and SDA lanes.
Here is what datasheet says about I2C clock:
AgustinOrdonez_0-1697678430995.png
This is what I have configured:
MAIN_CLOCK=12MHz
CLKDIV=4
MSTIME=17 (High and low at 3 cycles)
This is what analyzer sees:
AgustinOrdonez_1-1697678577282.png
AgustinOrdonez_2-1697678598938.png
As we can see high and low times are uneven and frequency is not 400kHz
Why could this be happening?