LPC845 I2C Clock issues at 400kHz

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LPC845 I2C Clock issues at 400kHz

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AgustinOrdonez
Contributor I

Hello, I am trying to configure I2C to work at 400kHz. I am using a logic analyzer at 8Ms/s to see SCL and SDA lanes.

Here is what datasheet says about I2C clock:

AgustinOrdonez_0-1697678430995.png

This is what I have configured:

MAIN_CLOCK=12MHz
CLKDIV=4
MSTIME=17 (High and low at 3 cycles)

This is what analyzer sees:

AgustinOrdonez_1-1697678577282.png

AgustinOrdonez_2-1697678598938.png

As we can see high and low times are uneven and frequency is not 400kHz

Why could this be happening?

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

As the following Figure, both the MSTSCLLOW and MSTSCLHIGH bits only specify the minimum time of the SCL low and high time, there is internal rule to define the concrete time.'

Hope it can help you

BR

XiangJun Rong

xiangjun_rong_1-1697695500816.png

 

 

 

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AgustinOrdonez
Contributor I

Hello, thanks for answering. I get less than 400kHz either with or without another device connected to I2C lane. Is this still normal?

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,

I suppose it is normal, the I2C clock is not related with if the I2C slave device is connected. But the I2C slave device can provide the ACK signal when the master send the slave address and direction, so I suggest you connect I2C slave device when you test I2C function.

Hope it can help you

BR

XiangJun Rong

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