LPC55S1x VBAT_DCDC rise time requirement

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LPC55S1x VBAT_DCDC rise time requirement

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jackl_intercomp
Contributor II

Hello,

According to the LPC55S1x errata sheet, the rise time for the supply of the VBAT_DCDC pin should be at least 2.6 ms to guarantee startup in the worst case temperature. Is there a maximum slew rate for this requirement? For example, a voltage regulator we are considering using has the following startup timing:

image.png

The total rise time is well over the 2.6ms requirement. However, the jump from 0V to ~1.5V happens in about 0.375ms, which is a slew rate of 4V/ms. Will this cause a problem with the LPC55S1x?

Thanks.

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Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello, 

I review your case with my team unfortunately the regulator doesn't follow our datasheet. The ramp-up condition and slope should follow as mentioned below:

Pavel_Hernandez_0-1671470973157.png

Best regards,
Pavel

 

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Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello, 

I review your case with my team unfortunately the regulator doesn't follow our datasheet. The ramp-up condition and slope should follow as mentioned below:

Pavel_Hernandez_0-1671470973157.png

Best regards,
Pavel

 

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jackl_intercomp
Contributor II

Ok, thank you for looking into this. We will take this regulator out of consideration then.

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Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello,

I'm working on your case, please let me get more details about your question, and when I have more information, I will contact you.

Best regards,
Pavel

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