LPC5536 MCAN RF0F Interrupt

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LPC5536 MCAN RF0F Interrupt

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microcris
Contributor III

Hello,

Why am I getting this interrupt (IR:RF0F) if the IE:RF0FE is set to 0?

 

I'm trying to figure this out by monitoring the IE register and it is changing from 0x3800000 to 0x3800001, the bit number 3 is not being set at anytime.

 

Best regards,

Cristiano Rodrigues

 

 

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello @microcris 

Thanks for your question.

The flag (IR:RF0F) is automatically set by the hardware and has no relation to the interrupt enable register IE:RF0FE. The IE register notifies the CPU to execute the interrupt handler. Regarding the change of IE bit 0 from 0 to 1, please debug the code to check where this bit is being modified.

Thank you.

BR

Alice

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microcris
Contributor III
Hello @Alice_Yang!

Thank you for your answer.
It is all fine with the IE register. I was just stating that the IE:RF0FE (it is the bit number 2 and not the bit number 3) was not being set and the and the IR:RF0F was being triggered. If it is an hardware thing, it is all right then.
It is just a little bit annoying to have a kStatus_MCAN_TxIdle and a kStatus_MCAN_UnHandled with result set to kMCAN_RxFifo0FullFlag for every received message.

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Alice_Yang
NXP TechSupport
NXP TechSupport

Hello @microcris 

The flag of kMCAN_RxFifo0FullFlag is to avoid Rx FIFO overflow.

 

Thank you.

Alice

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