Hi,
I suppose that there is not dedicated doc which focuses on the USB double buffer design.
This is the USB buffer architecture:

For the double buffer design, for each logic endpoints, for the input buffer, there are two buffer for each ENDPOINT IN, for out buffer, there are two buffers.
So each logic end points will like:
IN buffer for each logic endpoint.
CS NBYTES Offset1
CS NBYTES Offset2
OUT buffer for each logic endpoint.
CS NBYTES Offset3
CS NBYTES Offset4
Hope it can help you
BR
XiangJun Rong