Hi, Manu,
The SPI timing spec is defined in data sheet of LPC5460x.pdf, which can be downloaded from the link.
https://www.nxp.com/docs/en/data-sheet/LPC546XX.pdf
If the SPI is configured as master, we have a delay register to define the delay timing. For detailed inf, pls refer to Table 453. SPI Delay register (DLY, offset 0x404) bit description in UM10912.pdf.
I copy part of it here from data sheet:

Hope it can help you
BR
XiangJun Rong