LPC54102 power rail leakage?

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LPC54102 power rail leakage?

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StephenYeh
Contributor III

Hi,

Is it possible that power rail design

@ VDDA:3.3V / VDD:1.8V / VREFN: 0V / VREFP:2.5V ?

We got the issue that VDD will leakage to 2.3V.

 

StephenYeh_0-1660053260817.png

 

 

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3 Replies

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StephenYeh
Contributor III

Hi,

I check the spec.(the leakage will from VIA design(it will refer. VDD) right?

StephenYeh_0-1660092919193.png

 

 

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ZhangJennie
NXP TechSupport
NXP TechSupport

Hi StephenYeh 

This issue is linked with a internal ticket. I will keep you informed if any update.

For now, I suggest you setting VDDA equal to VDD.

Thanks,

Jun Zhang

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ZhangJennie
NXP TechSupport
NXP TechSupport

Hi @StephenYeh 

In the limiting table, the analog input voltage should say VDDA instead of VDD. When the ADC is used, the signal levels signal levels on analog input pins must not be above the level of VDDA at any time.

Hope this helps,

Jun Zhang

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