LPC54016 SPIFI seems to only read 2 bytes

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LPC54016 SPIFI seems to only read 2 bytes

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andrewsglenn
Contributor III

HI.

I'm running my application out of RAM, and need to store data to transmit in Flash, reading it our quickly into a RAM buffer and then sending it out to a device. 

We're using a MX25R6435FZNIL0 Flash, at 1.8V, so the maximum transfer speed is 80 MHz and I've sent the SPIFI clock to 48 MHz for safety.

I copied code from the spifi_dma_transfer SDK example code using DMA to transfer data TO the Flash, and SPIFI memory mapping to read the data FROM flash. I copied the spifi_command_t array from the #elif FLASH_MX25R block to match the flash we are using.

Erasing and writing appear to work (as far as I can tell), but I'm having trouble with reading back. I issue the following commands to put the SPIFI in read mode

 

    SPIFI_ResetCommand(SPIFI0);

    SPIFI_SetMemoryCommand(SPIFI0, (spifi_command_t*)&command[READ]);

 

After these commands I can see the memory in the Memory window of MCUXpressoIDE (before it's just ????????), but only the first two bytes appear, the rest are 0xFFFFFFFF:

andrewsglenn_0-1728233715609.png

A memcpy() from the location shows the same, the first two bytes are read and the rest are 0xFF:

andrewsglenn_1-1728233861163.png

I've tried looking at other regions, such as where I'd expect the program to be, and see the same thing, a sea of 0xFF with the occasional pair of non-FF bytes.

Any ideas?

Glenn

 

 

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Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello, my apologize for the delayed response, I need more information about your case, could you tell me if the standard mode or the dual mode for the read still working as normal?

Best regards,
Pavel

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andrewsglenn
Contributor III

Hi Pavel,

A single-channel SPI read is working, using the 'fast read' command opcode 0x0B.

As far as I could tell with the logic analyzer I'm sending the correct command to enable Quad Mode, but after sending the enable command, quad mode read (opcode 0x6B) gives back a garbage response.

I have not gotten dual mode read to work either, but I didn't try very hard.

Regards,

Glenn

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Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello, I recommend open an internal case, to upload the schematic of your board, to offer a analyze of this, because this is a custom board. Just put my name on it and I will take it.

Best regards,
Pavel

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andrewsglenn
Contributor III
Done.
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Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello, my name is Pavel, and I will be supporting your case, I reviewed your code, but this is not similar to the example SDK, I could not see the board Init pins, clocks and if you are using the debugger message in console.

In this case I could not test on my side because the memory is different from the SDK. 

Best regards,
Pavel

 

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andrewsglenn
Contributor III

Hi Pavel,

Yes, I'm using the Macronix MX25R6435F Flash part, since we are running at 1.8V

The spifi_dma_transfer example has an #if block that defines SPIFI commands depending on flash part, and I used the ones for FLASH_MX25R. Everything works except for the READ command. opcode 0x6B

Since the program works if I change the read to a fast SPI read (opcode 0x0B) instead of QSPI read, I'm assuming the command that is in the example is wrong, since you probably never tested with the MX25R parts.

I've attached the datasheet for the Flash. Can you look at Section 10-14 on page 40 and see if you can work out why the command fails?

Thanks

Glenn

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andrewsglenn
Contributor III

My init function:

 

static spifi_dma_handle_t my_flash_dma_handle;
static bool flash_initialized = false; 

enum my_errno flash_init(void) {
    if (flash_initialized) {
        return ERR_SUCCESS;
    }

    /* Reset SPIFI Device */
    RESET_PeripheralReset(kSPIFI_RST_SHIFT_RSTn);

    // SPIFI0_SPIFI_Handle has already been created by BOARD_InitPeripherals()
    /* Create a custom SPIFI DMA handle */
    SPIFI_TransferTxCreateHandleDMA(
        SPIFI0_PERIPHERAL,
        &my_flash_dma_handle,
        spifi_dma_callback,
        NULL,
        &SPIFI0_SPIFI_Handle);

    /* Enable Quad mode */
    enable_quad_mode();

    flash_initialized = true;

    return ERR_SUCCESS;
}

 

 

enable_quad_mode() is the function from the sample, using 0x40 for QUAD_MODE_VAL

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Pavel_Hernandez
NXP TechSupport
NXP TechSupport

Hello, this seems that the QE is not enable yet, could you please use a logic analyzer to review when is sending this message. I reviewed the datasheet and the 0x40 seems good to active the bit 6 to enable the QE.

Best regards,
Pavel

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andrewsglenn
Contributor III
Any idea why quad write is working but quad read is not?
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andrewsglenn
Contributor III

I'm calling enable_quad_mode() with the value 0x40, so it SHOULD be in quad mode.

I'll set up the Logic Analyzer.

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andrewsglenn
Contributor III

Quad mode write appears to work:

andrewsglenn_0-1728406245765.png

 

Read does something weird:

andrewsglenn_1-1728406324957.png

 

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andrewsglenn
Contributor III

Output from logic analyzer. It appears the correct command is sent and then waits for the finish bit to clear.

andrewsglenn_0-1728405990714.png

 

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andrewsglenn
Contributor III

Some progress: Quad mode read opcode 0x6B is not working, but I got it to work in fast read, opcode 0x0B:

static const spifi_command_t command[] = {
    [QREAD] = {FLASH_PAGE_SIZE, false, kSPIFI_DataInput, 1, kSPIFI_CommandDataQuad, kSPIFI_CommandOpcodeAddrThreeBytes, 0x6B},
	[FAST_READ] = {FLASH_PAGE_SIZE, false, kSPIFI_DataInput, 1, kSPIFI_CommandAllSerial, kSPIFI_CommandOpcodeAddrThreeBytes, 0x0B},
    [PROGRAM_PAGE] = {FLASH_PAGE_SIZE, false, kSPIFI_DataOutput, 0, kSPIFI_CommandOpcodeSerial, kSPIFI_CommandOpcodeAddrThreeBytes, 0x38},
    [GET_STATUS] = {1, false, kSPIFI_DataInput, 0, kSPIFI_CommandAllSerial, kSPIFI_CommandOpcodeOnly, 0x05},
    [ERASE_SECTOR] = {0, false, kSPIFI_DataOutput, 0, kSPIFI_CommandAllSerial, kSPIFI_CommandOpcodeAddrThreeBytes, 0x20},
    [WRITE_ENABLE] = {0, false, kSPIFI_DataOutput, 0, kSPIFI_CommandAllSerial, kSPIFI_CommandOpcodeOnly, 0x06},
    [WRITE_DISABLE] = {0, false, kSPIFI_DataOutput, 0, kSPIFI_CommandAllSerial, kSPIFI_CommandOpcodeOnly, 0x04},
    [WRITE_REGISTER] = {1, false, kSPIFI_DataOutput, 0, kSPIFI_CommandAllSerial, kSPIFI_CommandOpcodeOnly, 0x01}
};

 

Looking at the data sheet I think the command is correct for QREAD, but if anyone can spot the problem I'd be very grateful. I got the values from the sample code provided with the SDK.

andrewsglenn_0-1728319104434.png

 

Thanks in advance.

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