I am using LPC4367JBD208E for one of my product development. I am facing the issue where I am not able to get the debug access of the controller.
While I was doing the debugging I do following procedure in our own designed development board.
1. Put the MCU in ISP mode and then do Mass erase using the GUI flash tool in MCU xpresso 10.3
2. kill the debug connection
3. Open the MCU Xpresso 11.2 and put the code into debugging mode.
One more observation to share is that while using the MCU xpresso 11.2 which is the latest version I am not able to do mass erase after putting the MCU in ISP mode. For that i have use MCUXpresso 10.3.
Now while debugging and reprograming the controller stopped giving access to debug. then we followed the procedure mentioned in the https://community.nxp.com/thread/389112
But still no success, I had also put the query in the forum previously
But not getting any proper solution as such. Also I want to know following things,
1. How to enable ISP boot mode or to check whether it is getting disabled in the code?
2. What are the reasons of getting MCU locked while debugging?
3. How to resolve the bricking of the MCU in case of LPC controllers?
4. Is LPC link2 suffice the debugging and development of the tri core controller?
Also we matched the schematic of Eval board OM13088 and LPC link 2, but still no success.
Request you to please resolve this issue since we are not able to release the design due to this issue and moving ahead it will affect the product development and release as well.
This is highly critical and need proper attention and expertise of you people.
Hi Gaurav More
- You can mass erase FLASH in ISP mode with MCUXpresso 10.3 but can't do the same with 11.2. What's the error message?
- You have mass erased FLASH in ISP mode with MCUXpresso 10.3. still In ISP mode, Can you connect and debug code with 10.3 still? ( we want to identify if the problem is related with IDE versions )
- Is this issue on one board or all board? how does the connection if LPCXpresso4367 demo board? Can we reproduce your issue with demo board?
- NXP latest IDE is MCUXpresso IDE v11.3.0, could you please test it with 11.3.0?
Hi Zhang Jennie,
I have checked with the eval board there I am able to do mass erase. I did that exercise today morning to check the data. But when I am trying to do this with my development board then it is not detecting the controller cores.
I am able to program the my project on the eval board without doing mass erase but this same exercise when I do with my development board then I need to erase every time when I program my board.
Also I have one observation regarding the Evaluation board, when I was debugging the example code like LED blinky of your LPCOpen part then IF_TCK_SWCLK line will remain stable means no toggling observed but the code is running.
But when I debug my project which I made then the and observed the lines then the IF_TCK_SWCLK line was toggling. please check the video attached.
Following are the lines in the MSO while monitoring the lines.
D0 - IF_TMS_SWDIO
D1 - IF_TCK_SWCLK
D2 - IF_TDO_SWO
D3 - IF_JTAG_TDI
D4 - IF-RST
D5 - IF_ISPEN
Also refer the attached Schematics of Eval board.
I requires your expertise sir to resolve. Request you all to please pitch in to resolve this issue . I will provide all the required data to you.
SO all your original problem is on your own development board. All fine on the EVK board. Right?
If so, So you use Jtag or SWD I suggest checking your PCB. Here is debug interface design considerations.
What debug probe do you work with? if LPC-Link2, try updating firmware again. both CMSIS-DAP and Jink. check which interface can work normal.
It might be worth noting that Flash erasing and progamming involves an increased power consumption.
Perhaps some power supply issue, or related to the PCB/layout of the board.
Yes I have checked the same as well but still no success. Currently the situation is due to this issue we have stopped the developments and working on this issue,
One question regarding the controller loosing access to the cores or loosing the debug access . Does Deep sleep or power down mode can be one of the reason to put the controller in locking states or loosing access states?
Since recently one case occurs where I am able to do mass erase using LPC link2 but when trying the launch and debug using Jtag option i am not able to see any core connected.
Similarly when i trried to debug the same using SWD mode i am able to launch and debug but only one core M4 core. Both the M0 cores are not accessible to me. And similar things are mentioned in the errata as well
Please clarify so that I will check for the same. Also what are the reasons due to which the controller will go to these deep sleep and power down mode?
Let me know the same so that I will check for the same.