Hi, JiaAn,
Regarding your question, as you know that it is impossible to read the ADC result from FIFO and write it to memory if you sample the analog channel with 80MSPS, that is why that you have top use DMA to transfer the ADC result from FIFO to memory. Of course, in low sampling frequency, you can use interrupt mode, and in the ISR, you can read the sample from FIFO, and write it to memory.
For your question, if you set the INTERRUPT bit in the corresponding Descriptor, when the descriptor is executed, the DSCR_DONE bit in HSADC status0 register will be set, and an interrupt can be triggered.
In other words, when the analog channel in the descriptor has sampled, the DSCR_DONE bit is set, an interrupt is triggered, you can read the sample from FIFO in ISR in low speed sampling frequency.
Hope it can help you
BR
XiangJun Rong

