Hi @Alice_Yang ,
Thanks for your replay.
As per your suggestion I made simple project to test SDRAM. So far am not using the debugger in our project and am using the uart for
verifying the program flow .
After checking the SDRAM test code am getting error that Data buss success, address bus failure and last bit of data get corrupted.
-----------------------------------------------------Please find the below code for your reference------------------------------------------------------
status_t SDRAM_DataBusCheck(volatile uint32_t *address)
{
uint32_t data = 0;
/* Write the walking 1's data test. */
for (data = 1; data != 0; data <<= 1)
{
*address = data;
/* Read the data out of the address and check. */
if (*address != data)
{
return kStatus_Fail;
}
}
return kStatus_Success;
}
status_t SDRAM_AddressBusCheck(volatile uint32_t *address, uint32_t bytes)
{
char xyz[10];
uint32_t pattern = 0x55555555;
uint32_t size = bytes / 4;
uint32_t offset;
uint32_t checkOffset;
/* write the pattern to the power-of-two address. */
for (offset = 1; offset < size; offset <<= 1)
{
address[offset] = pattern;
}
address[0] = ~pattern;
/* Read and check. */
for (offset = 1; offset < size; offset <<= 1)
{
if (address[offset] != pattern)
{
sprintf(xyz,"%x",address[offset]);
USART_WriteByte(NIBP_USART,xyz[0]);
USART_WriteByte(NIBP_USART,xyz[1]);
USART_WriteByte(NIBP_USART,xyz[2]);
USART_WriteByte(NIBP_USART,xyz[3]);
USART_WriteByte(NIBP_USART,xyz[4]);
USART_WriteByte(NIBP_USART,xyz[5]);
USART_WriteByte(NIBP_USART,xyz[6]);
USART_WriteByte(NIBP_USART,xyz[7]);
USART_WriteByte(NIBP_USART,'-');
return kStatus_Fail;
}
}
if (address[0] != ~pattern)
{
USART_WriteByte(NIBP_USART,'W');
return kStatus_Fail;
}
/* Change the data to the revert one address each time
* and check there is no effect to other address. */
for (offset = 1; offset < size; offset <<= 1)
{
address[offset] = ~pattern;
for (checkOffset = 1; checkOffset < size; checkOffset <<= 1)
{
if ((checkOffset != offset) && (address[checkOffset] != pattern))
{
return kStatus_Fail;
}
}
address[offset] = pattern;
}
return kStatus_Success;
}
void BOARD_TestSDRAM(void)
{
char xyz[10];
uint32_t *sdram = (uint32_t *)SDRAM_BASE_ADDR;
uint8_t index;
if (SDRAM_DataBusCheck(sdram) != kStatus_Success)
{
USART_WriteByte(NIBP_USART,'D');
USART_WriteByte(NIBP_USART,'B');
USART_WriteByte(NIBP_USART,'F');
USART_WriteByte(NIBP_USART,'-');
// PRINTF("\r\n SDRAM data bus check is failure.\r\n");
}
else if (SDRAM_DataBusCheck(sdram) == kStatus_Success)
{
USART_WriteByte(NIBP_USART,'D');
USART_WriteByte(NIBP_USART,'B');
USART_WriteByte(NIBP_USART,'S');
USART_WriteByte(NIBP_USART,'-');
}
if (SDRAM_AddressBusCheck(sdram, SDRAM_SIZE_BYTES) != kStatus_Success)
{
USART_WriteByte(NIBP_USART,'A');
USART_WriteByte(NIBP_USART,'B');
USART_WriteByte(NIBP_USART,'F');
USART_WriteByte(NIBP_USART,'-');
// PRINTF("\r\n SDRAM address bus check is failure.\r\n");
}
else if (SDRAM_AddressBusCheck(sdram, SDRAM_SIZE_BYTES) == kStatus_Success)
{
USART_WriteByte(NIBP_USART,'A');
USART_WriteByte(NIBP_USART,'B');
USART_WriteByte(NIBP_USART,'S');
USART_WriteByte(NIBP_USART,'-');
}
USART_WriteByte(NIBP_USART,'D');
USART_WriteByte(NIBP_USART,'S');
USART_WriteByte(NIBP_USART,'W');
// PRINTF("\r\n Start EMC SDRAM access example.\r\n");
// PRINTF("\r\n SDRAM Write Start, Start Address 0x%x, Data Length %d !\r\n", sdram, SDRAM_EXAMPLE_DATALEN);
for (index = 0; index < SDRAM_EXAMPLE_DATALEN; index++)
{
*(uint32_t *)(sdram + index) = index;
}
// PRINTF("\r\n SDRAM Write finished!\r\n");
// PRINTF("\r\n SDRAM Read/Check Start, Start Address 0x%x, Data Length %d !\r\n", sdram, SDRAM_EXAMPLE_DATALEN);
for (index = 0; index < SDRAM_EXAMPLE_DATALEN; index++)
{
if (*(uint32_t *)(sdram + index) != index)
{
USART_WriteByte(NIBP_USART,'E');
USART_WriteByte(NIBP_USART,'R');
USART_WriteByte(NIBP_USART,'R');
USART_WriteByte(NIBP_USART,'-');
sprintf(xyz,"%x",index);
USART_WriteByte(NIBP_USART,xyz[0]);
USART_WriteByte(NIBP_USART,xyz[1]);
// PRINTF("\r\n SDRAM Write Data and Read Data Check Error!\r\n");
break;
}
}
USART_WriteByte(NIBP_USART,'D');
USART_WriteByte(NIBP_USART,'O');
USART_WriteByte(NIBP_USART,'N');
USART_WriteByte(NIBP_USART,'E');
USART_WriteByte(NIBP_USART,'-');
}
int main(void)
{
status_t status;
ctimer_config_t configtimer;
ctimer_match_config_t matchConfig;
enet_config_t config;
//uint8_t index;
void *buff;
phy_speed_t speed;
phy_duplex_t duplex;
uint32_t refClock = 50000000;
uint8_t *buffer;
uint32_t timedelay;
bool link=false;
int termWidth;
int termHeight;
int temp=0;
int charWidth;
int lineHeight;
int i=0,j=0;
int c = 0;
int c_prev = 0;
unsigned long errRt=0;
char xyz[10];
WM_HWIN hItem;
int xSize=0,ySize=0;
unsigned int memTest[100];
static unsigned char Toggleled=0;
uint32_t index;
BOARD_InitBootPins();
BOARD_InitBootClocks();
BOARD_InitBootPeripherals();
BOARD_InitSDRAM();
POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*< Turn on USB Phy */
POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY); /*< Turn on USB Phy */
CLOCK_EnableClock(kCLOCK_Gpio4);
/* Enable the RTC 32K Oscillator */
SYSCON->RTCOSCCTRL |= SYSCON_RTCOSCCTRL_EN_MASK;
// For ADC
/* Enable the asynchronous bridge */
SYSCON->ASYNCAPBCTRL = 1;
// Set the back light PWM. Below is not working as Backlight pin is set as permanently high
BOARD_InitPWM();
CLOCK_EnableClock(kCLOCK_Sdio);
//Enable PINT
CLOCK_EnableClock(kCLOCK_Pint);
BOARD_TestSDRAM();
while(1)
{
}
return 0;
}
/---------------------------------------------------------------end------------------------------------------------------------------------------------------------------