Flash Programming access block in LPC54608J512BD208

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Flash Programming access block in LPC54608J512BD208

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prasannanaik
Contributor III

Hi,

I am using LPC54608J512BD208in my design.

We want to restrict access to flash memory from SWD interface once the controller has been programmed.

I need confirmation on following queries:

1) While going through chapter 42 -  Enhanced Code Read Protection of User manual, I found that it is possible to disable the SWD interface.

But there is a line "When Mass Erase is enabled, the Debug Mailbox is also enabled and allows a debugger to
communicate with the bootloader to execute a Mass Erase. The Debug Mailbox is disabled if Mass Erase
is disabled". 

As per my understanding, if SWD is disabled then no one can gain access of Flash of microcontroller so even mass erase won't be possible even if i keep this Mass Erase bit enable in OTP bank register.

2) Also, i want to program the controller through my secondary bootloader (based on UART) so i am not disabling the IAP write/erase feature. Is there anything else i need if i disable SWD interface?

 

Thanks & best regards,

Prasanna Naik

 

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,Prasanna Naik

Regarding your question "As per my understanding, if SWD is disabled then no one can gain access of Flash of microcontroller so even mass erase won't be possible even if i keep this Mass Erase bit enable in OTP bank register.", I agree with you that you can not program the flash via SWD port once the SWD is disabled. But if you enable the mass-erase feature by clearing the "CRP_MASS_ERASE_DISABLE" bit in OTP register, in  ISP mode, the host can send the mass-erase command to erase all flash no matter the flash sectors are protected or not. You can also use IAP command to execute the mass-erase instruction.

Regardless of how many sectors are protected by this field, an erase request to erase the
entire flash (0 to last sector) will always be completed successfully if the Mass Erase disable bit in the
OTP is not programmed.

In other words, you can operate flash with n3 methods, one is to execute command  via SWD, the second is that host send mass-erase command in ISP mode, the third is application code executes IAP command.

Hope it can help you

BR

XiangJun Rong

 

 

 

 

 

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi,Prasanna Naik

Regarding your question "As per my understanding, if SWD is disabled then no one can gain access of Flash of microcontroller so even mass erase won't be possible even if i keep this Mass Erase bit enable in OTP bank register.", I agree with you that you can not program the flash via SWD port once the SWD is disabled. But if you enable the mass-erase feature by clearing the "CRP_MASS_ERASE_DISABLE" bit in OTP register, in  ISP mode, the host can send the mass-erase command to erase all flash no matter the flash sectors are protected or not. You can also use IAP command to execute the mass-erase instruction.

Regardless of how many sectors are protected by this field, an erase request to erase the
entire flash (0 to last sector) will always be completed successfully if the Mass Erase disable bit in the
OTP is not programmed.

In other words, you can operate flash with n3 methods, one is to execute command  via SWD, the second is that host send mass-erase command in ISP mode, the third is application code executes IAP command.

Hope it can help you

BR

XiangJun Rong

 

 

 

 

 

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